Editing Visual Instruction Set

'''Visual Instruction Set''', or '''VIS''', is a [[SIMD]] instruction set extension for [[SPARC|SPARC V9]] [[microprocessor]]s developed by [[Sun Microsystems]]. There are five versions of VIS: VIS 1, VIS 2, VIS 2+, VIS 3 and VIS 4.<ref>{{cite web|url=http://www.sun.com/processors/vis/download/mlib/mlib_wp.pdf |title=MT mediaLib for Chip MultiThreaded (CMT) Processors |access-date=2007-12-03 |author=Liang He |author2=Harlan McGhan |date=May 2005 |publisher=Sun Microsystems, Inc. |format=PDF |url-status=dead |archive-url=https://web.archive.org/web/20061230112444/http://www.sun.com/processors/vis/download/mlib/mlib_wp.pdf |archive-date=December 30, 2006 }}</ref>

== History ==
VIS 1 was introduced in 1994 and was first implemented by Sun in their [[UltraSPARC]] microprocessor (1995) and by Fujitsu in their [[SPARC64 GP]] microprocessors (2000).

VIS 2 was first implemented by the [[UltraSPARC III]]. All subsequent UltraSPARC and SPARC64 microprocessors implement the instruction set.

VIS 3 was first implemented in the [[SPARC T4]] microprocessor.  

VIS 4 was first implemented in the [[SPARC M7]] microprocessor.

== Differences vs x86 ==
{{disputed|date=November 2017}}
VIS is not an instruction toolkit like [[Intel]]'s MMX and SSE. MMX has only 8 registers shared with the [[Floating-point unit|FPU]] stack, while SPARC processors have 32 registers, also aliased to the double-precision (64-bit) floating point registers.

As with the SIMD instruction set extensions on other [[RISC]] processors, VIS strictly conforms to the main principle of RISC: keep the instruction set concise and efficient.

This design is very different from comparable extensions on [[Complex instruction set computer|CISC]] processors, such as [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSE4]], [[3DNow!]].

Sometimes, programmers must use several VIS instructions to accomplish an operation that can be done with only one [[MMX (instruction set)|MMX]] or [[Streaming SIMD Extensions|SSE]] instruction, but it should be kept in mind that fewer instructions do not automatically result in better performance.

== Functionality ==
VIS re-uses existing SPARC V9 64-bit floating point registers to hold multiple 8, 16, or 32-bit integer values. In this respect, VIS is more similar to the design of [[MMX (instruction set)|MMX]] than other SIMD architectures such as [[Streaming SIMD Extensions|SSE]]/[[SSE2]]/[[AltiVec]].

VIS includes a number of operations primarily for graphics support, so most of them are only for integers. These include 3D to 2D conversion, [[edge detection|edge processing]] and pixel distance.

There are four ways to use VIS in code:
*The [[GNU Compiler Collection|GCC]] -{{text|mvis}} option
*Use [[inline assembly]]
*Use inline template in [[VSDK]], similar to [[compiler intrinsics]], which have C function like interfaces
*Use the [[mediaLib]] multimedia library, which has C function interfaces. It uses VIS on SPARC platforms (and MMX/SSE/SSE2 on x86/x64 platforms) to accelerate multimedia application execution

== References ==
{{Reflist}}
* Gwennap, Linley (5 December 1995). "UltraSparc Adds Multimedia Instructions". ''[[Microprocessor Report]]''.
* [[Marc Tremblay|Tremblay, Marc]] et al. (August 1996). "VIS Speeds New Media Processing". ''[[IEEE Micro]]''.

==External links==
*[http://mikeburrell.wordpress.com/2007/12/14/an-introduction-to-sparcs-simd-offerings/ An introduction to SPARC’s SIMD offerings (small tutorial)]
* [http://docs.oracle.com/cd/E19683-01/816-1681/sparcv9-tbl-26/index.html UltraSPARC and VIS Instruction Set Extensions]
* [https://gcc.gnu.org/onlinedocs/gcc/SPARC-VIS-Built-in-Functions.html GCC SPARC VIS Built-in Functions]

{{Multimedia extensions}}
{{Sun Microsystems}}

[[Category:SIMD computing]]
[[Category:Sun Microsystems hardware]]
[[Category:SPARC microprocessor architecture]]
[[Category:Computer-related introductions in 1994]]