Editing Memory address register

{{Short description|CPU register}}
{{Refimprove|date=July 2016}}
In a [[computer]], the '''memory address  register''' ('''MAR''')<ref>{{Cite web|url=https://www.cs.umd.edu/class/sum2003/cmsc311/Notes/Overall/mar.html|title=Understanding the MAR and the MDR|website=www.cs.umd.edu|access-date=2017-01-20|url-status=dead|archive-url=https://web.archive.org/web/20170328171842/http://www.cs.umd.edu/class/sum2003/cmsc311/Notes/Overall/mar.html|archive-date=2017-03-28}}</ref> is the [[Central processing unit|CPU]] [[Hardware register|register]] that either stores the [[memory address]] from which data will be fetched to the CPU registers, or the address to which data will be sent and stored via [[system bus]].

In other words, this register is used to access data and instructions from memory during the execution phase of instruction. MAR holds the memory location of data that needs to be accessed. When reading from memory, data addressed by MAR is fed into the [[Memory data register|MDR]] (memory data register) and then used by the CPU. When writing to memory, the CPU writes data from MDR to the memory location whose address is stored in MAR. MAR, which is found inside the CPU, goes either to the RAM ([[random-access memory]]) or cache.

The MAR register is half of a minimal interface between a [[microprogram]] and [[computer storage]]; the other half is a [[Memory data register|MDR]].

In general, MAR is a parallel load register that contains the next memory address to be manipulated, for example the next address to be read or written.

==References==
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[[Category:Digital registers]]


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