Editing I386

{{Short description|32-bit microprocessor by Intel}}
{{About|the microprocessor|the instruction set|IA-32}}
{{Redirect|386 DX|the Russian artist and musician|Alexei Shulgin}}
{{Lowercase title}}
{{Use mdy dates|date=October 2018}}
{{Infobox CPU
| name        = i386
| image       = [[File:Intel i386 logo.svg|frameless|upright=0.5]]{{pb}}[[File:KL Intel i386DX.jpg|frameless|upright=1]]
| caption     = An Intel i386DX 16&nbsp;MHz processor with a gray ceramic heat spreader
| manuf1      = Intel
| manuf2      = AMD
| manuf3      = IBM
| produced-start = October 1985
| produced-end = September 28, 2007<ref>{{cite web |archive-url=https://web.archive.org/web/20061009060120/http://developer.intel.com/design/pcn/Processors/D0106013.pdf |archive-date=9 October 2006 |url=http://developer.intel.com/design/pcn/Processors/D0106013.pdf |title=Product Change Notification |date=2 May 2006}}</ref>
| slowest     = 12.5    | slow-unit     = MHz
| fastest     = 40    | fast-unit     = MHz
| size-from   = 1.5 μm
| size-to     = 1 μm
| arch        = [[x86-16]], [[IA-32]]
| pack1       = 132-pin [[Pin grid array|PGA]], 132-pin [[Plastic quad flat package|PQFP]]; SX variant: 88-pin PGA, 100-pin [[Bumpered quad flat package|BQFP]] with 0.635 mm pitch
| predecessor = [[Intel 80286]]
| successor   = [[i486]]
| co-processor = {{ubl|386DX: [[X87#80387|Intel 80387]]|386SX: [[Intel 80387SX]]}}
|transistors={{ubl|275,000|386SL: 855,000<ref name=intelquickref>{{cite web |title=Microprocessor Quick Reference Guide |url=https://www.intel.com/pressroom/kits/quickreffam.htm |publisher=Intel |access-date=24 September 2023}}</ref><ref name="Chen, Allan 1991, page 2">Chen, Allan, "The 386 SL Microprocessor Superset: The 32-bit Notebook Hits the Road", Intel Corporation, Microcomputer Solutions, January/February 1991, page 2</ref>}}
| data-width=32 bits (386SX: 16 bits)
| address-width=32 bits (386SX: 24 bits)
| sock1=[[Pin Grid Array|PGA132]]
| support status = Unsupported
|model1=i386DX|model2=i386SX|model3=i386SL|model4=i376|model5=i386EX(T/TB/C)|model6=i386CXSA|model7=i386SXSA/i386SXTA|model8=i386CXSB|model9=RapidCAD}}
[[File:Intel A80386DX-20 CPU Die Image.jpg|thumb|Intel A80386DX-20 CPU die image]]

The '''Intel 386''', originally released as the '''80386''' and later renamed '''i386''', is the third-generation [[x86]] architecture [[microprocessor]] from [[Intel]]. It was the first [[32-bit computing|32-bit]] processor in the line, making it a significant evolution in the x86 architecture. Pre-production samples of the 386 were released to select developers in 1985, while mass production commenced in 1986. The 386 was the [[central processing unit|central processing unit (CPU)]] of many [[workstation]]s and high-end [[personal computer]]s of the time. The 386 began to fall out of public use starting with the release of the [[i486]] processor in 1989, while in [[embedded system]]s the 386 remained in widespread use until Intel finally discontinued it in 2007.

Compared to its predecessor the [[Intel 80286]] ("286"), the 80386 added a three-stage [[instruction pipelining|instruction pipeline]] which it brings up to total of 6-stage instruction pipeline, extended the architecture from 16-bits to 32-bits, and added an on-chip [[memory management unit]]. This [[paging]] translation unit made it much easier to implement operating systems that used [[virtual memory]]. It also offered support for [[X86 debug register|register debugging]]. The 386 featured three operating modes: real mode, protected mode and virtual mode. The [[protected mode]], which debuted in the 286, was extended to allow the 386 to address up to 4 [[Gigabyte|GB]] of memory. With the addition of segmented addressing system, it can expand up to 64 terabytes of virtual memory. The all new [[virtual 8086 mode]] (or ''VM86'') made it possible to run one or more [[real mode]] programs in a protected environment, although some programs were not compatible.

The 32-bit i386 can correctly execute most code intended for the earlier 16-bit processors such as 8086 and 80286 that were ubiquitous in early [[Personal computer|PC]]s. As the original implementation of the 32-bit extension of the 80286 architecture,{{Efn|The 80286 was itself an extension of the [[Intel 8086|8086]] architecture with advanced memory management functions and significantly better performance.}} the i386 instruction set, programming model, and binary encodings are still the [[Instruction selection#Lowest common denominator strategy|common denominator]] for all 32-bit x86 processors, which is termed the ''i386 architecture'', ''x86'', or ''[[IA-32]]'', depending on context. Over the years, successively newer implementations of the same architecture have become several hundreds of times faster than the original 80386 (and thousands of times faster than the [[Intel 8086|8086]]).{{Efn|This considers integer performance only, as processors prior to the [[i486|486DX]] require a coprocessor to perform floating point calculations in hardware. Increases in floating point performance are measured in tens of thousands of times, compared to the 8086's floating point coprocessor the [[8087]], or hundreds of thousands of times compared to software implementations of [[floating-point arithmetic|floating point]] on the [[8086]].}}

==Production history==
In the early 1980s [[Intel]], the creator of [[80286]], was aware of that microprocessor's poor reputation. The company's own engineers believed that [[Motorola 68000]] was superior to their "ugly duckling". [[Bill Gates]] called 80286 "brain dead", and important customer [[IBM]] thought that its architecture was a flawed dead end. While the company expected that [[Intel i432]] would be its future architecture, i432 was very slow and many also believed unsuitable. Groups worked on various successors, including a completely new architecture ("P4") from i432 designer [[Glen Myers]] that resembled [[DEC VAX]], and another ("P7") intended to combine Myers's work and i432 technology.<ref name="inteloh20081202">{{Cite interview |last=Crawford |first=John |interviewer=Jim Jarrett |title=Intel 386 Microprocessor Design and Development Oral History Panel |last2=Hill |first2=Gene |last3=Leukhardt |first3=Jill |last4=Prak |first4=Jan Willem |last5=Slager |first5=Jim |url=https://archive.computerhistory.org/resources/access/text/2015/06/102702019-05-01-acc.pdf |access-date=2025-05-15 |publisher=Computer History Museum |place=Mountain View, California |language=en-US}}</ref>

Although many in the company believed that a 32-bit successor to 80286 was nonviable, Gene Hill and 80286 co-designer Robert Childs secretly worked on the "stepchild" project and persuaded others of its potential over Myers's plan, which people such as [[John Crawford (engineer)|John Crawford]] compared to the events at [[Data General]] in ''[[The Soul of a New Machine]]''. [[Binary compatibility]] with the [[Intel 8086]] architecture the recently introduced [[IBM PC]] used was at first not seen as important, and many disliked the older CPUs' [[segmented memory]] model. A greater priority was a 32-bit [[flat memory model]] so 80386 can, like 68000, run [[Unix]] well.{{r|savage}}{{r|inteloh20081202}}

80386 development began in 1982 under the internal name of P3. Intel previously used [[NMOS logic]] but 80386 was its first [[CMOS]] product, consistent with the industry trend. The rapidly growing IBM PC [[installed base]] made supporting its software library more important, and Intel salespeople told customers that their 286 software would run on 386. The 386 designers thus supported both flat and segmented memory models, what Crawford described as "the best of both worlds". [[Pat Gelsinger]] led the port of [[Amdahl UTS]] to the CPU to confirm Unix's viability. The limited [[die (integrated circuit)|die]] size made difficult incorporating, for marketing purposes, a [[CPU cache]] twice as large as the [[68020]]'s. The team's Jim Slager later described both CPUs' caches as useless, but he and his colleagues succeeded.{{r|inteloh20081202}}

The [[tape-out]] of the 80386 development was finalized in July 1985.<ref name="solutions-dec-1985">{{cite magazine |last=Gomes |first=Lee |date=November–December 1985 |title=Behind the Scenes: The Making of the 386. |issue=Special 32-Bit Issue: "A Well-Bred Classic: The 80386" |magazine=Solutions<!--Microcomputer Solutions?--> |publisher=[[Intel|Intel Corporation]] |editor-last=Rant |editor-first=Jon |page=19}}</ref> The 80386 was introduced as pre-production samples for software development [[workstation]]s in October 1985.<ref>{{cite journal | last=Goering | first=Richard | title=Development Tools Support 80386 Applications | url=https://books.google.com/books?id=60A-AQAAIAAJ&q=%22Valid+Logic%22+80386+%22Daisy%22 | date=December 1985 | journal=Computer Design | publisher=PennWell | volume=24 | issue=17 | pages=33–34 | access-date=October 14, 2021 | via=Gale OneFile}}</ref> Intel had exited the [[DRAM]] market to focus on microprocessors, so the former "stepchild" was vital to its future; the company moved memory engineers to the 80386 project, improving the [[die shrink]]. The forthcoming product persuaded customers that the 80286 was not a dead end, increasing the latter's sales.{{r|inteloh20081202}}

80386 manufacturing in volume began in June 1986,<ref name="Infoworld Jan 1986">{{Cite magazine | last = Forbes | first = Jim | title = Development of 386 Accelerating |magazine= InfoWorld | volume = 8 | issue = 4 | page =5 | publisher = InfoWorld Media Group| date = January 27, 1986 | url = https://books.google.com/books?id=my8EAAAAMBAJ&pg=PA5 | issn = 0199-6649 }} Introduced October 1985, production chip in June 1986.</ref><ref name = "Infoworld Sep 1986">{{Cite magazine | last = Ranney | first = Elizabeth | title = ALR Hopes to Beat Completion With Fall Release of 386 Line |magazine= InfoWorld | volume = 8 | issue = 35 | page =5 | publisher = InfoWorld Media Group| date = September 1, 1986| url = https://books.google.com/books?id=cS8EAAAAMBAJ&pg=PA5| issn = 0199-6649}} The first 80386 computers were released around October 1986.</ref> along with the first plug-in device that allowed existing 80286-based computers to be upgraded to the 386, the Translator 386 by [[American Computer and Peripheral]].<ref>{{cite journal | last=Whitmore | first=Sam | title=Product Lets Users Write Software for 80386 at Low Cost | url=https://link.gale.com/apps/doc/A4280128/GPS | date=June 17, 1986 | journal=PCWeek | publisher=Ziff-Davis | volume=3 | issue=24 | page=11 | access-date=October 14, 2021 | via=Gale OneFile}}</ref><ref>{{cite journal | last=Rhein | first=Bob | date=August 11, 1986 | url=https://archive.org/details/sim_mis-week_1986-08-11_7_32/page/38/ | title=ACP Is Readying 2 Boards | journal=MIS Week | volume=7 | issue=32 | page=38 | publisher=Fairchild Publications | via=the Internet Archive}}</ref> The 80386 being [[sole source]]d made the CPU very expensive,<ref name="byte198902">{{Cite magazine |last=Marshall |first=Trevor |last2=Tazelaar |first2=Jane Morrill |date=February 1989 |title=Worth the RISC |url=https://archive.org/details/eu_BYTE-1989-02_OCR/page/n299/mode/2up?view=theater |access-date=2024-10-08 |magazine=BYTE |pages=245–249}}</ref> but it was very successful. Hill recalled representing the design team at a ''[[PC Magazine]]'' awards ceremony:{{r|inteloh20081202}}

{{quote|But what really sunk in my brain was to look around the room, because all the awards that year were for the 386 boxes, software, boards, chips, peripheral chips. It was all 386. So here was a whole ballroom full of people, the elite in their various industries that were getting awards just because of the 386. So it really struck me how many jobs and how much businesses had been created from the 386. It became not only the king of Intel, but the king of many industries, not just the PC industry.}}

Although the multiple segment models were rarely used their existence may have benefited Intel, because the complexity slowed other companies' ability to [[second source]] the CPU.{{r|inteloh20081202}} [[Mainboard]]s for 80386-based computer systems were cumbersome and expensive at first, but manufacturing was justified upon the 80386's mainstream adoption. The first [[personal computer]] to make use of the 80386 was the [[Compaq Deskpro 386|Deskpro 386]], designed and manufactured by [[Compaq]];<ref name="savage">{{Cite web |last=Savage |first=Marcia |date=June 27, 2009 |title=The Intel 386SX: The processor that brought the PC industry to the next level |url=http://www.crn.com/crn/special/supplement/816/816p65_hof.jhtml |url-status=dead |archive-url=https://web.archive.org/web/20090627055110/http://www.crn.com/crn/special/supplement/816/816p65_hof.jhtml |archive-date=June 27, 2009 |access-date=March 15, 2018 |website=ChannelWeb |via=The Internet Archive}}</ref> this marked the first time a fundamental component in the [[IBM PC compatible]] de facto standard was updated by a company other than [[IBM]].

The first versions of the 386 have 275,000 transistors.<ref name=intelquickref/> The 20&nbsp;MHz version operates at 4–5 [[Million instructions per second|MIPS]]. It also performs between 8,000 and 9,000 [[Dhrystone]]s per second.<ref name="auto">Intel Corporation, "New Product Focus Components: The 32-Bit Computing Engine Full Speed Ahead", Solutions, May/June 1987, page 10</ref> The 25&nbsp;MHz 386 version is capable of 7 MIPS.<ref name="Lewnes, Ann 1988, page 2">Lewnes, Ann, "Welcome 80386SX", Microcomputer Solutions, September/October 1988, page 2</ref> A 33&nbsp;MHz 80386 was reportedly measured to operate at about 11.4 and 11.5 MIPS.<ref>{{cite web |url=http://intel80386.com |title=Intel Architecure Programming and Information |website=intel80386.com |access-date=March 15, 2018}}</ref><ref name="Intel Corporation 1992, page 11">Intel Corporation, "A Guide to the Intel Architecture", Microcomputer Solutions, January/February 1992, page 11</ref> At that same speed, it has the performance of 8 [[VAX Unit of Performance|VAX MIPS]].<ref name="Lewnes, Ann 1989, page 2">Lewnes, Ann, "The Intel386 Architecture Here to Stay", Intel Corporation, Microcomputer Solutions, July/August 1989, page 2</ref> These processors run about 4.4 clocks per instruction.<ref>Chen, Allan, "Designing a Mainframe on a Chip: Interview with the i486 Microprocessor Design Team", Intel Corporation, Microcomputer Solutions, July/August 1989, page 12</ref>

In May 2006, Intel announced that i386 production would stop at the end of September 2007.<ref>{{cite web |title=Intel cashes in ancient chips |url=http://www.reghardware.co.uk/2006/05/18/intel_cans_386_486_960_cpus/ |access-date=May 18, 2006 |archive-url=https://web.archive.org/web/20110813073335/http://www.reghardware.com/2006/05/18/intel_cans_386_486_960_cpus/ |archive-date=August 13, 2011 |url-status=dead}}</ref> Although it had long been obsolete as a [[personal computer]] CPU, Intel and others had continued making the chip for [[embedded system]]s. Such systems using an i386 or one of many derivatives are common in [[aerospace]] technology and electronic musical instruments, among others. Some mobile phones also used (later fully static [[CMOS]] variants of) the i386 processor, such as the [[BlackBerry 950]]<ref>{{cite web |url=http://the-gadgeteer.com/2001/02/26/rim_blackberry_950_review/ |title=RIM BlackBerry 950 Review |website=The Gadgeteer |date=February 26, 2001 |access-date=March 15, 2018}}</ref> and [[Nokia 9000 Communicator]]. [[Linux]] continued to support i386 processors until December 11, 2012, when the kernel cut 386-specific instructions in version 3.8.<ref name="phoronix-linux-drop-support">{{cite web |url=https://www.phoronix.com/scan.php?page=news_item&px=MTI0OTg |title=Linux Kernel Drops Support for Old Intel 386 CPUs |last=Larabel |first=Michael |website=[[Phoronix]] |date=December 12, 2012 |access-date=October 14, 2019}}</ref>

== Architecture ==
[[File:80386DX arch.png|300px|thumb|left|Block diagram of the i386 [[microarchitecture]]]]
{| class="infobox" style="font-size:88%;width:33em;"
|-
|+ i386 registers
|-
|
{| style="font-size:88%"
|-
| style="width:10px; text-align:center"| <sup>3</sup><sub>1</sub>
| style="width:120px; text-align:center"| ...
| style="width:10px; text-align:center"| <sup>1</sup><sub>5</sub>
| style="width:50px; text-align:center"| ...
| style="width:10px; text-align:center"| <sup>0</sup><sub>7</sub>
| style="width:35px; text-align:center"| ...
| style="width:10px; text-align:center"| <sup>0</sup><sub>0</sub>
| style="width:auto; background:white; color:black" | ''(bit position)''
|-
|colspan="8" | '''Main registers''' ''(8/16/32 bits)''
|- style="background:silver;color:black;text-align:left"
| style="text-align:center" colspan="2"| EAX
| style="text-align:center" colspan="2"| AX
| style="text-align:center" colspan="3"| AL
| style="background:white; color:black"| '''A'''ccumulator register
|- style="background:silver;color:black;text-align:left"
| colspan="2" style="text-align:center" | ECX
| colspan="2" style="text-align:center" | CX
| colspan="3" style="text-align:center" | CL
| style="background:white; color:black" | '''C'''ount register
|- style="background:silver;color:black;text-align:left"
| colspan="2" style="text-align:center" | EDX
| colspan="2" style="text-align:center" | DX
| colspan="3" style="text-align:center" | DL
| style="background:white; color:black" | '''D'''ata register
|- style="background:silver;color:black;text-align:left"
| style="text-align:center" colspan="2"| EBX
| style="text-align:center" colspan="2"| BX
| style="text-align:center" colspan="3"| BL
| style="background:white; color:black"| '''B'''ase register
|-
|colspan="8" | '''Index registers''' ''(16/32 bits)''
|- style="background:silver;color:black"
| colspan="2" style="text-align:center" | ESP
| colspan="5" style="text-align:center" | SP
| style="background:white; color:black" | '''S'''tack '''P'''ointer
|- style="background:silver;color:black"
| colspan="2" style="text-align:center" | EBP
| colspan="5" style="text-align:center" | BP
| style="background:white; color:black" | '''B'''ase '''P'''ointer
|- style="background:silver;color:black"
| style="text-align:center" colspan="2"| ESI
| style="text-align:center" colspan="5"| SI
| style="background:white; color:black"| '''S'''ource '''I'''ndex
|- style="background:silver;color:black"
| style="text-align:center" colspan="2"| EDI
| style="text-align:center" colspan="5"| DI
| style="background:white; color:black"| '''D'''estination '''I'''ndex
|-
|colspan="8" | '''Program counter''' ''(16/32 bits)''
|- style="background:silver;color:black"
| style="text-align:center" colspan="2"| EIP
| style="text-align:center" colspan="5"| IP
| style="background:white; color:black"| '''I'''nstruction '''P'''ointer
|-
|colspan="8" | '''Segment selectors''' ''(16 bits)''
|- style="background:silver;color:black"
| style="text-align:center;background:#FFF" colspan="2"| &nbsp;
| style="text-align:center" colspan="5"| CS
| style="background:white; color:black"| '''C'''ode '''S'''egment
|- style="background:silver;color:black"
| style="text-align:center;background:#FFF" colspan="2"| &nbsp;
| style="text-align:center" colspan="5"| DS
| style="background:white; color:black"| '''D'''ata '''S'''egment
|- style="background:silver;color:black"
| style="text-align:center;background:#FFF" colspan="2"| &nbsp;
| style="text-align:center" colspan="5"| ES
| style="background:white; color:black"| '''E'''xtra '''S'''egment
|- style="background:silver;color:black"
| style="text-align:center;background:#FFF" colspan="2"| &nbsp;
| style="text-align:center" colspan="5"| FS
| style="background:white; color:black"| '''F''' '''S'''egment
|- style="background:silver;color:black"
| style="text-align:center;background:#FFF" colspan="2"| &nbsp;
| style="text-align:center" colspan="5"| GS
| style="background:white; color:black"| '''G''' '''S'''egment
|- style="background:silver;color:black"
| style="text-align:center;background:#FFF" colspan="2"| &nbsp;
| style="text-align:center" colspan="5"| SS
| style="background:white; color:black"| '''S'''tack '''S'''egment
|}

{| style="font-size:88%"
|-
|colspan="20" | '''Status register'''
|-
| style="width:20px; text-align:center"| &nbsp;
| style="width:10px; text-align:center"| <sup>1</sup><sub>7</sub>
| style="width:10px; text-align:center"| <sup>1</sup><sub>6</sub>
| style="width:10px; text-align:center"| <sup>1</sup><sub>5</sub>
| style="width:10px; text-align:center"| <sup>1</sup><sub>4</sub>
| style="width:10px; text-align:center"| <sup>1</sup><sub>3</sub>
| style="width:10px; text-align:center"| <sup>1</sup><sub>2</sub>
| style="width:10px; text-align:center"| <sup>1</sup><sub>1</sub>
| style="width:10px; text-align:center"| <sup>1</sup><sub>0</sub>
| style="width:10px; text-align:center"| <sup>0</sup><sub>9</sub>
| style="width:10px; text-align:center"| <sup>0</sup><sub>8</sub>
| style="width:10px; text-align:center"| <sup>0</sup><sub>7</sub>
| style="width:10px; text-align:center"| <sup>0</sup><sub>6</sub>
| style="width:10px; text-align:center"| <sup>0</sup><sub>5</sub>
| style="width:10px; text-align:center"| <sup>0</sup><sub>4</sub>
| style="width:10px; text-align:center"| <sup>0</sup><sub>3</sub>
| style="width:10px; text-align:center"| <sup>0</sup><sub>2</sub>
| style="width:10px; text-align:center"| <sup>0</sup><sub>1</sub>
| style="width:10px; text-align:center"| <sup>0</sup><sub>0</sub>
| style="width:auto; background:white; color:black" | ''(bit position)''
|- style="background:silver;color:black"
| style="text-align:center;background:#FFF"| &nbsp;
| style="text-align:center"| [[Virtual 8086 mode|V]]
| style="text-align:center"| R
| style="text-align:center"| 0
| style="text-align:center"| N
| style="text-align:center" colspan="2"| [[IOPL]]
| style="text-align:center"| [[Overflow flag|O]]
| style="text-align:center"| [[Direction flag|D]]
| style="text-align:center"| [[IF (x86 flag)|I]]
| style="text-align:center"| [[Trap flag|T]]
| style="text-align:center"| [[Sign flag|S]]
| style="text-align:center"| [[Zero flag|Z]]
| style="text-align:center"| 0
| style="text-align:center"| [[Adjust flag|A]]
| style="text-align:center"| 0
| style="text-align:center"| [[Parity flag|P]]
| style="text-align:center"| 1
| style="text-align:center"| [[Carry flag|C]]
| style="background:white; color:black" | [[FLAGS register|EFlags]]
|}
|}

The processor was a significant evolution in the [[x86]] architecture, and extended a long line of processors that stretched back to the [[Intel 8008]]. The predecessor of the 80386 was the [[Intel 80286]], a [[16-bit computing|16-bit]] processor with a [[memory segment|segment]]-based memory management and protection system. The 80386 added a three-stage instruction pipeline which it brought up to total of 6-stage instruction pipeline, extended the architecture from [[16-bit computing|16-bit]]s to [[32-bit computing|32-bit]]s, and added an on-chip [[memory management unit]].<ref>Intel Corporation, "Extending the Legacy of Leadership: The 80386 Arrives", Special 32-Bit Issue Solutions, November/December 1985, page 2</ref> This [[paging]] translation unit made it much easier to implement operating systems that used [[virtual memory]]. It also offered support for [[X86 debug register|register debugging]].

The 80386 featured three operating modes: real mode, protected mode and virtual mode. The [[protected mode]], which debuted in the 286, was extended to allow the 386 to address up to 4 [[Gigabyte|GB]] of memory. With the addition of segmented addressing system, it can expand up to 64 terabytes of virtual memory.<ref>Rant, Jon; "Extending the Legacy of Leadership: The 80386 Arrives", Intel Corporation, Special 32-Bit Issue Solutions, November/December 1985, page 2</ref> The all new [[virtual 8086 mode]] (or ''VM86'') made it possible to run one or more [[real mode]] programs in a protected environment, although some programs were not compatible. It features scaled indexing and 64-bit barrel shifter.<ref>Intel Corporation, "New Product Focus Component: A 32-Bit Microprocessor With A Little Help From Some Friends", Special 32-Bit Issue Solutions, November/December 1985, page 13</ref>

The ability for a 386 to be set up to act like it had a [[flat memory model]] in protected mode despite the fact that it uses a segmented memory model in all modes was arguably the most important feature change for the x86 processor family until [[AMD]] released the [[x86-64]] in 2003.

Several new instructions have been added to 386: BSF, BSR, BT, BTS, BTR, BTC, CDQ, CWDE, LFS, LGS, LSS, MOVSX, MOVZX, SETcc, SHLD, SHRD.

Two new segment registers have been added (FS and GS) for general-purpose programs. The single Machine Status Word of the 286 grew into eight [[control register]]s CR0–CR7. [[X86 debug register|Debug registers]] DR0–DR7 were added for hardware breakpoints. New forms of the MOV instruction are used to access them.

The chief architect in the development of the 80386 was [[John H. Crawford]].<ref>{{cite web|url=http://www.intel.com/pressroom/kits/bios/crawford.htm |title=Intel Fellow—John H. Crawford |publisher=Intel.com |date=August 16, 2010 |access-date=September 17, 2010}}</ref> He was responsible for extending the 80286 architecture and instruction set to 32-bits, and then led the [[microprogram]] development for the 80386 chip.

The [[i486]] and [[P5 (microarchitecture)|P5]] [[Pentium]] line of processors were descendants of the i386 design.

=== Data types ===
The following data types are directly supported and thus implemented by one or more i386 [[machine instruction]]s; these data types are briefly described here.<ref name="Miller2005p2" /><!--(copyrasted) <ref>[https://books.google.com/books?id=KJNpD2KimEsC&lpg=PP1&pg=PA514 page 514].</ref>-->:
* ''Bit'' ([[Boolean data type|Boolean]] value), ''bit field'' (group of up to 32 bits) and ''bit string'' (up to 4 Gbit in length).
* ''8-bit integer (byte)'', either signed (range −128..127) or unsigned (range 0..255).
* ''16-bit integer'', either signed (range −32,768..32,767) or unsigned (range 0..65,535).
* ''32-bit integer'', either signed (range −2<sup>31</sup>..2<sup>31</sup>−1) or unsigned (range 0..2<sup>32</sup>−1).
* ''Offset'', a 16- or 32-bit displacement referring to a memory location (using any addressing mode).
* ''Pointer'', a 16-bit selector together with a 16- or 32-bit offset.
* ''Character'' (8-bit character code).
* ''String'', a sequence of 8-, 16- or 32-bit words (up to 4 Gbyte in length).<ref>{{Cite journal|last1=El-ayat|first1=K. A.|last2=Agarwal|first2=R. K.|date=December 1985|title=The Intel 80386 - Architecture And Implementation|journal=IEEE Micro|volume=5|issue=6|pages=4–22|doi=10.1109/mm.1985.304507|s2cid=23062397|issn=0272-1732}}</ref>
*''[[Binary-coded decimal|BCD]]'', decimal digits (0..9) represented by unpacked bytes.
*''Packed BCD'', two BCD digits in one byte (range 0..99).

== Example code ==
The following i386 [[assembly language|assembly]] source code is for a subroutine named <code>_strtolower</code> that copies a null-terminated [[ASCIIZ]] character string from one location to another, converting all alphabetic characters to lower case. The string is copied one byte (8-bit character) at a time.

{|
|
<!--NOTE: DO NOT REMOVE BLANK LINES--><pre>
                         
                         
                         
                         
                         
                         
                         
                         
                         
00000000  55
00000001  89E5
00000003  8B750C
00000006  8B7D08
00000009  FC
0000000A  AC
0000000B  3C41
0000000D  7C06
0000000F  3C5A
00000011  7F02
00000013  0420
00000015  AA
00000016  84C0
00000018  75F0
0000001A  5D
0000001B  C3 
</pre>
|
<syntaxhighlight lang="nasm">
; _strtolower:
; Copy a null-terminated ASCII string, converting
; all alphabetic characters to lower case.
;
; Entry stack parameters
;      [ESP+8] = src, Address of source string
;      [ESP+4] = dst, Address of target string
;      [ESP+0] = Return address
;
_strtolower proc
push   ebp			; Set up the call frame
mov	   ebp,esp
mov	   esi,[ebp+0xc]	; Set ESI = src
mov	   edi,[ebp+0x8]	; Set EDI = dst
cld				        ; Auto-increment ESI and EDI
again: lodsb			; Load AL from [src] and increment ESI
cmp    al,'A'			; If AL < 'A',
jl     copy			    ; Skip conversion
cmp    al,'Z'			; If AL > 'Z',
jg	   copy		        ; Skip conversion
add	   al,'a'-'A'      	; Convert AL to lowercase
copy:  stosb			; Store AL to [dst]
test   al,al			; If AL != 0,
jnz	   again			; Repeat the loop
pop	   ebp		 	    ; Restore the previous call
ret				        ; Return to caller
end    proc
</syntaxhighlight>
|}

The example code uses the EBP (base pointer) register to establish a [[call frame]], an area on the stack that contains all of the parameters and local variables for the execution of the subroutine. This kind of [[calling convention]] supports [[reentrancy (computing)|reentrant]] and [[recursion (computer science)|recursive]] code and has been used by Algol-like languages since the late 1950s. A flat memory model is assumed, specifically, that the DS and ES segments address the same region of memory.

==Business importance==
The first PC based on the Intel 80386 was the [[Compaq Deskpro 386]]. By extending the 16/24-bit [[IBM PC/AT]] standard into a natively 32-bit computing environment, [[Compaq]] became the first company to design and manufacture such a major technical hardware advance on the PC platform. IBM was offered use of the 80386, but had manufacturing rights for the earlier [[80286]]. IBM therefore chose to rely on that processor for a couple more years. The early success of the Compaq Deskpro 386 played an important role in legitimizing the PC "clone" industry and in de-emphasizing IBM's role within it. The first computer system sold with the 386SX was the [[Compaq Deskpro 386#Later models|Compaq Deskpro 386S]], released in July 1988.<ref name=Satchell1988b>{{cite journal | last=Satchell | first=Stephen | date=August 1, 1988 | url=https://books.google.com/books?id=dDoEAAAAMBAJ&pg=PA53 | title=Compaq Deskpro 386S: Compaq Introduces First of New Breed to Business Users | journal=InfoWorld | publisher=IDG Publications | volume=10 | issue=31 | pages=54–56 | via=Google Books}}</ref>

Prior to the 386, the difficulty of manufacturing microchips and the uncertainty of reliable supply made it desirable that any mass-market semiconductor be multi-sourced, that is, made by two or more manufacturers, the second and subsequent companies manufacturing under license from the originating company. The 386 was for ''a time'' (4.7 years) only available from Intel, since [[Andrew Grove|Andy Grove]], Intel's CEO at the time, made the decision not to encourage other manufacturers to produce the processor as [[second source]]s. This decision was ultimately crucial to Intel's success in the market.{{Citation needed|date=July 2008}} The 386 was the first significant microprocessor to be [[Single-source publishing|single-sourced]]. Single-sourcing the 386 allowed Intel greater control over its development and substantially greater profits in later years.

[[Advanced Micro Devices|AMD]] introduced its compatible [[Am386]] processor in March 1991 after overcoming legal obstacles, thus ending Intel's 4.7-year monopoly on 386-compatible processors. From 1991 IBM also manufactured 386 chips under license for use only in IBM PCs and boards.

==Compatibles==
{{More citations needed section|date=December 2024}} 
[[File:KL IBM 80386DX.jpg|right|thumb|180px|Intel i386 packaged by IBM]]
* The [[AMD]] [[Am386]]SX and Am386DX were almost exact clones of the i386SX and i386DX. Legal disputes caused production delays for several years, but AMD's 40&nbsp;MHz part eventually became very popular with computer enthusiasts as a low-cost and low-power alternative to the 25&nbsp;MHz 486SX. The power draw was further reduced in the "notebook models" (Am386 DXL/SXL/DXLV/SXLV), which could operate with 3.3&nbsp;V and were implemented in fully static [[CMOS]] circuitry.
* [[Chips and Technologies]] Super386 38600SX and 38600DX were developed using [[reverse engineering]]. They sold poorly, due to some technical errors and incompatibilities, as well as their late appearance on the market. They were therefore short-lived products.
* [[Cyrix]] [[486SLC|Cx486SLC]]/[[486DLC|Cx486DLC]] could be (simplistically) described as a kind of 386/486 hybrid chip that included a small amount of on-chip cache. It was popular among computer enthusiasts but did poorly with [[Original equipment manufacturer|OEM]]s. The Cyrix Cx486SLC and Cyrix Cx486DLC processors were pin-compatible with i386SX and i386DX respectively. These processors were also manufactured and sold by [[Texas Instruments]].
* [[IBM]] [[386SLC]] and [[IBM 386SLC#IBM 486SLC|486SLC]]/DLC were variants of Intel's design which contained a large amount of on-chip cache (8 KB, and later 16 KB). The agreement with Intel limited their use to IBM's own line of computers and upgrade boards only, so they were not available on the open market.
* [[V.M. Technology]] VM386SX+ was developed by [[Tsukuba]], Japan-based fabless microprocessor design firm V.M. Technology (VMT), founded by former [[Intel 4004]] and [[Zilog Z80]] microprocessor design engineer [[Masatoshi Shima]], with its primary funding originating from [[ASCII Corporation]]. The chip was primarily marketed in [[East Asia]], avoiding the US market deliberately.<ref>{{cite magazine|magazine=[[Microprocessor Report]]|title=Proliferation of 386/486-Compatible Microprocessors to Accelerate in ’92|date=January 22, 1992|url=
https://websrv.cecs.uci.edu/~papers/mpr/MPR/ARTICLES/060101.PDF}}</ref><ref>{{cite magazine|magazine=[[Microprocessor Report]]|title=Texas Instruments Extends 486 Line|date=November 15, 1993|url=https://websrv.cecs.uci.edu/~papers/mpr/MPR/ARTICLES/071504.pdf}} Mentions V.M. Technology's history and funding in the article, along with its Intel 386SX pin compatible product, VM386SX+.</ref> [[ALi]] M6117 SoC contains an x86 core derived from VM386SX+.

==Early problems==
Intel originally intended for the 80386 to debut at 16&nbsp;MHz. However, due to poor yields, it was instead introduced at 12.5&nbsp;MHz.<ref>{{cite magazine
| last        = Rosch
| first       = Winn L.
| date        = 29 September 1987
| title       = 386s Weigh In
| url         = https://books.google.com/books?id=u5dYmhF7jc4C&pg=PA92
| magazine    = PC Mag
| page        = 92
| issue       = 39
| location    = 
| publisher   =  Ziff Davis
| access-date = 8 November 2003
}}</ref>

Early in production, Intel discovered a marginal circuit that could cause a system to return incorrect results from 32-bit multiply operations. Not all of the processors already manufactured were affected, so Intel tested its inventory. Processors that were found to be bug-free were marked with a double [[sigma]] (ΣΣ), and affected processors were marked "16 BIT S/W ONLY".<ref>{{cite journal |last1=Prosise |first1=Jeff |title=Tutor |journal=PC Magazine |date=February 11, 1992 |volume=11 |issue=3 |page=328}}</ref> These latter processors were sold as good parts, since at the time 32-bit capability was not relevant for most users.<ref>{{cite magazine
| last        = Moran
| first       = Tom
| date        = 28 September 1987
| title       = Intel will not fix gray-market chips with 32-bit multiply bug
| url         = https://books.google.com/books?id=ljsEAAAAMBAJ
| magazine    = InfoWorld
| volume      = 9
| issue       = 39
| location    = 
| publisher   = InfoWorld Publishing, Inc.
| access-date = 8 November 2003
}}</ref>

The [[X87#80387|i387]] math coprocessor was not ready in time for the introduction of the 80386, and so many of the early 80386 motherboards instead provided a socket and [[hardware logic]] to make use of an [[X87#80287|80287]]. In this configuration the FPU operated asynchronously to the CPU, usually with a clock rate of 10&nbsp;MHz. The original Compaq Deskpro 386 is an example of such design. However, this was an annoyance to those who depended on floating-point performance, as the performance advantages of the 80387 over the 80287 were significant. {{citation needed|date=June 2022}}

<gallery>
Image:Intel A80386-12.jpg | A very early 80386 at 12&nbsp;MHz (A80386-12), before the 32-bit multiply bug was found
Image:Intel A80386-16 16 bit SW Only.jpg | An A80386-16 marked "16 BIT S/W ONLY" with the multiply bug
Image:Intel A80386-16 ΣΣ.jpg | A bug-free A80386-16 marked "ΣΣ"
</gallery>

==Pin-compatible upgrades==
[[File:KL Upgrade 386.jpg|150px|right|thumb|Typical 386 upgrade CPUs from Cyrix and Texas Instruments]]
Intel later offered a modified version of its 486DX in i386 packaging, branded as the Intel [[RapidCAD]]. This provided an upgrade path for users with i386-compatible hardware. The upgrade was a pair of chips that replaced both the i386 and i387. Since the 486DX design contained an [[Floating-point unit|FPU]], the chip that replaced the i386 contained the floating-point functionality, and the chip that replaced the i387 served very little purpose. However, the latter chip was necessary in order to provide the FERR signal to the mainboard and appear to function as a normal floating-point unit.

Third parties offered a wide range of upgrades, for both SX and DX systems. The most popular ones were based on the Cyrix 486DLC/SLC core, which typically offered a substantial speed improvement due to its more efficient instruction pipeline and internal [[CPU cache#Multi-level caches|L1]] SRAM cache. The cache was usually 1 KB, or sometimes 8 KB in the TI variant. Some of these upgrade chips (such as the 486DRx2/SRx2) were marketed by Cyrix themselves, but they were more commonly found in kits offered by upgrade specialists such as Kingston, [[Evergreen Technologies]] and Improve-It Technologies. Some of the fastest CPU upgrade modules featured the IBM SLC/DLC family (notable for its 16 KB L1 cache), or even the Intel 486 itself. Many 386 upgrade kits were advertised as being simple drop-in replacements, but often required complicated software to control the cache or clock doubling. Part of the problem was that on most 386 motherboards, the [[A20 line]] was controlled entirely by the motherboard with the CPU being unaware, which caused problems on CPUs with internal caches.

Overall, it was very difficult to configure upgrades to produce the results advertised on the packaging, and upgrades were often not very stable or not fully compatible.
{{Clear}}

== Models and variants ==

===Early 5 V models===

==== i386DX ====
[[File:Intel i386DX 25.jpg|thumb|Intel i386DX, 25&nbsp;MHz]]
Original version, released in October 1985. The 16&nbsp;MHz version was available for 299&nbsp;[[United States dollar|USD]] in quantities of 100.<ref>Intel Corporation, "New Product Focus Component: A 32-Bit Microprocessor With A Little Help From Some Friends", Special 32-Bit Issue Solutions, November/December 1985, page 13.</ref> The 20&nbsp;MHz version was available for 599 USD in quantities of 100.<ref name="auto"/> The 33&nbsp;MHz version was made available on April 10, 1989.<ref name="Lewnes, Ann 1989, page 2"/>
* Capable of working with 16- or 32-bit external busses
<!--* Cache: depends on mainboard-->
* Package: [[Pin Grid Array|PGA]]-132 which was available in sampling for fourth quarter of 1985<ref>Ashborn, Jim; "Advanced Packaging: A Little Goes A Long Way", Intel Corporation, Solutions, January/February 1986, Page 2</ref> or PQFP-132
* Process: First types [[CHMOS]] III, 1.5&nbsp;μm, later CHMOS IV, 1&nbsp;μm
* Die size: 104&nbsp;mm² (ca. 10&nbsp;mm × 10&nbsp;mm) in CHMOS III and 39&nbsp;mm² (6&nbsp;mm × 6.5&nbsp;mm) in CHMOS IV.
* Transistor count: 275,000<ref name=intelquickref/><ref name="Lewnes, Ann 1989, page 2"/>
* Specified max clock: 12&nbsp;MHz (early models), later 16, 20, 25 and 33&nbsp;MHz

==== M80386 ====
The military version was made using the CHMOS III process technology. It was made to withstand 105 [[Rad (unit)|Rads]] (Si) or greater. It was available for US$945 each in quantities of 100.<ref>Intel Corporation, "New Product Focus Components: 32-Bit Military Microprocessor: Up Front And Center", Solutions, January/February 1987, page 15</ref>

===={{anchor|The 80386SX variant}}  80386SX====
<!-- [[File:Intel386sx a 50 Kc.jpg|right|thumb|80386SX 16 MHz]]
[[File:i386SX.jpg|200px|right|thumb|A surface-mount version of Intel 80386SX processor in a [[Compaq]] Deskpro computer. It is non-upgradable unless hot-air circuit-board rework is performed]]
[[File:Intel 80386 SX die.JPG|200px|right|thumb|[[Die (integrated circuit)|Die]] of Intel 80386SX]]
[[File:80386SL processor from 1990.jpg|200px|right|thumb|i386SL from 1990]] -->

In 1988, Intel introduced the '''80386SX''', most often referred to as the '''386SX''', a cut-down version of the 80386 with a 16-bit data bus, mainly intended for lower-cost PCs aimed at the home, educational, and small-business markets, while the 386DX remained the high-end variant used in workstations, servers, and other demanding tasks. The CPU remained fully 32-bit internally, but the 16-bit bus was intended to simplify circuit-board layout and reduce total cost.{{efn|This was a similar approach to that used by Intel with the [[Intel 8088|8088]], a derivative of the Intel 8086, that was used in the original IBM PC.}} The 16-bit bus simplified designs but hampered performance. Only 24 pins were connected to the address bus, therefore limiting addressing to 16&nbsp;[[Megabyte|MB]],{{efn|The 16 MB limit was similar to that of the [[Motorola 68000|68000]], a comparable processor.}} but this was not a critical constraint at the time. Performance differences were due not only to differing data-bus widths, but also due to performance-enhancing [[cache memory|cache memories]] often employed on boards using the original chip. This version can run 32-bit application software at 70 to 90 percent the speed of the regular Intel386 DX CPU.<ref name="Intel Corporation 1992, page 11"/>

The original 80386 was subsequently renamed i386DX to avoid confusion. However, Intel subsequently used the "DX" suffix to refer to the [[floating-point]] capability of the i486DX. The 387SX was an 80387 part that was compatible with the 386SX (i.e. with a 16-bit databus). The 386SX was packaged in a surface-mount [[Quad flat package|QFP]] and sometimes offered in a socket to allow for an upgrade.

The 16&nbsp;MHz 386SX contains the 100-lead BQFP. It was available for USD $165 in quantities of 1000. It has the performance of 2.5 to 3 MIPS as well.<ref name="Lewnes, Ann 1988, page 2"/> The low-power version was available on April 10, 1989. This version that uses 20 to 30 percent less power and has higher operating temperature up to 100&nbsp;°C than the regular version.<ref name="Lewnes, Ann 1989, page 2"/>

<gallery>
File:Intel386sx a 50 Kc.jpg|80386SX 16&nbsp;MHz
File:i386SX.jpg|A surface-mount version of Intel 80386SX processor in a [[Compaq]] Deskpro computer. It is non-upgradable unless hot-air circuit-board rework is performed
File:Intel 80386 SX die.JPG|[[Die (integrated circuit)|Die]] of Intel 80386SX
</gallery>

====80386SL{{anchor|The i386SL variant}}====
The '''80386SL''' was introduced as a power-efficient version for [[laptop computer]]s. The processor offered several power-management options (e.g. [[System Management Mode|SMM]]), as well as different "sleep" modes to conserve [[battery (electricity)|battery]] power.<ref>Ellis, Simson C., "The 386 SL Microprocessor in Notebook PCs", Intel Corporation, Microcomputer Solutions, March/April 1991, page 20</ref> It also contained support for an external [[CPU cache|cache]] of 16 to 64 [[Kilobyte|KB]]. The extra functions and circuit implementation techniques caused this variant to have over 3 times as many [[transistor]]s as the i386DX. The i386SL was first available at 20&nbsp;MHz clock speed,<ref>{{cite web|url=http://www.islandnet.com/~kpolsson/micropro/proc1990.htm |title=Chronology of Microprocessors (1990-1992) |publisher=Islandnet.com |access-date=September 17, 2010}}</ref> with the 25&nbsp;MHz model later added.<ref>{{cite web|last=Mueller |first=Scott |url=http://www.informit.com/articles/article.aspx?p=130978&seqNum=27 |title=Microprocessor Types and Specifications > P3 (386) Third-Generation Processors |publisher=InformIT |access-date=September 17, 2010}}</ref> With this system, it reduced up to 40% foot space than the Intel386 SX system. That translate to lighter and more portable cost-effective system.<ref name="Intel Corporation 1992, page 11"/>

Dave Vannier, the chief architect designed this microprocessor. It took them two years to complete this design since it uses the existing 386 architecture to implement. That assist with advanced computer-aided design tools which includes a complete simulation of system board. This die contains the 386 CPU core, AT Bus Controller, Memory Controller, Internal Bus Controller, Cache Control Logic along with Cache Tag SRAM and Clock. This CPU contains 855,000 transistors using one-micron CHMOS IV technology. It was available for USD $176 in 1,000 unit in quantities.<ref name="Chen, Allan 1991, page 2">Chen, Allan, "The 386 SL Microprocessor Superset: The 32-bit Notebook Hits the Road", Intel Corporation, Microcomputer Solutions, January/February 1991, page 2</ref> The 25-MHz version was available in samples for USD $189 in 1,000-piece quantities, that version was finally made available in production by the end of 1991.<ref>Intel Corporation, "New Product Focus: Components: New 25-MHz CPU is Fastest for Notebooks", Microcomputer Solutions, November/December 1991, page 11</ref> It supports up to 32 Megabytes of physical address space.<ref name="Intel Corporation 1992, page 11"/><ref>{{cite web | publisher=Intel Corporation | title=Introduction to the Intel386 SL Microprocessor SuperSet Technical Overview | series=Order No. 240852-002 | date=September 1991 | page=37 | url=https://bitsavers.org/components/intel/80386/240852-002_386SL_Technical_Overview_1991.pdf | via=bitsavers.org}}</ref>  There was a 20-MHz cacheless version of Intel386 SL microprocessor, at the press time samples of this version were available for USD $101 in 1,000-piece quantities.<ref>Intel Corporation, "New Product Focus: OEM: Intel386 SL CPU Version Offers Cost-Savings", Microcomputer Solutions, March/April 1992, page 12</ref>  There were low-voltage 20-Mhz version and cacheless 16- and 20-Mhz version microprocessors.  These low voltage uses 3.3 Volts to supplied them and they do support full static mode as well.  They were available for USD $94, $48 and $78 respectively in 1,000 pieces quantities.<ref>Chen, Allen, "The New Mobile PC", Intel Corporation, Microcomputer Solutions, July/August 1992, page 3-9</ref>

<gallery>
File:80386SL processor from 1990.jpg|i386SL from 1990
</gallery>

==== SnapIn 386 ====
In May 1991, Intel introduced an upgrade for [[IBM PS/2 Model 50]] and [[IBM PS/2 Model 60|60]] systems which contain 80286 microprocessors, converting them to full blown 32-bit systems. The SnapIn 386 module is a daughtercard with 20-MHz 386SX and 16-Kbyte direct-mapped cache SRAM memory. It directly plugs into the existing 286 socket with no cables, jumpers or switches. In the winter of 1992, an additional to this module now supported to [[IBM PS/2 Model 50 Z]], [[IBM PS/2 Model 30 286|30 286]] and [[IBM PS/2 Model 25 286|25 286]] systems. Both modules were available for USD $495.<ref>Intel Corporation, "New Product Focus: Systems: SnapIn 386 Module Upgrades PS/2 PCs", Microcomputer Solutions, September/October 1991, page 12</ref><ref>Intel Corporation, "New Product Focus: Systems: More User Can Snap In An Intel386 CPU", Microcomputer Solutions, January/February 1992, page 10</ref>

==== RapidCAD ====
{{Main|RapidCAD}}
A specially packaged [[Intel 486]]DX and a dummy [[floating-point unit]] (FPU) designed as pin-compatible replacements for an i386 processor and [[i387]] FPU.

=== Versions for embedded systems ===

==== 80376 ====
{{Main|Intel 80376}}
This was an embedded version of the 80386SX which did not support real mode and paging in the MMU.

==== i386EX, i386EXTB and i386EXTC ====
{{Main|Intel 80386EX}}
[[File:KL Intel i386EX.jpg|thumb|Intel i386EXTC, 25 MHz]]
System and power management and built in peripheral and support functions: Two 82C59A interrupt controllers; Timer, Counter (3 channels); Asynchronous [[Serial Input Output|SIO]] (2 channels); Synchronous [[Serial Input Output|SIO]] (1 channel); Watchdog timer (Hardware/Software); [[Parallel Input Output|PIO]]. Usable with 80387SX or i387SL FPUs.
* Data/address bus: 16 / 26 bits
* Package: [[PQFP]]-132, [[SQFP]]-144 and PGA-168
* Process: CHMOS V, 0.8&nbsp;μm
* Specified max clock:
** i386EX: 16&nbsp;MHz @2.7–3.3 volts or 20&nbsp;MHz @3.0–3.6 volts or 25&nbsp;MHz @4.5–5.5 volts
** i386EXTB: 20&nbsp;MHz @2.7–3.6 volts or 25&nbsp;MHz @3.0–3.6 volts
** i386EXTC: 25&nbsp;MHz @4.5–5.5 volts or 33&nbsp;MHz @4.5–5.5 volts

====i386CXSA and i386SXSA (or i386SXTA)====
[[File:KL Intel i386CX.jpg|thumb|Intel i386CXSA, 25 MHz]]
Transparent power management mode, integrated [[Memory Management Unit|MMU]] and TTL compatible inputs (only 386SXSA). Usable with i387SX or i387SL FPUs.
* Data/address bus: 16 / 26 bits (24 bits for i386SXSA)
* Package: [[BQFP]]-100
* Voltage: 4.5–5.5 volts (25 and 33&nbsp;MHz); 4.75–5.25 volts (40&nbsp;MHz)
* Process: CHMOS V, 0.8&nbsp;μm
* Specified max clock: 25, 33, 40&nbsp;MHz

====i386CXSB====
Transparent power management mode and integrated [[Memory Management Unit|MMU]]. Usable with i387SX or i387SL FPUs.
* Data/address bus: 16 / 26 bits
* Package: [[BQFP]]-100
* Voltage: 3.0 volts (16&nbsp;MHz) or 3.3 volts (25&nbsp;MHz)
* Process: CHMOS V, 0.8&nbsp;μm
* Specified max clock: 16, 25&nbsp;MHz

==Obsolescence==
[[File:Intel chips 286 386 486 size comparison.jpg|thumb|Size comparison of the 286, 386 and 486]]
[[Windows 95]] was the only entry in the [[Windows 9x]] series to officially support the 386, requiring at least a 386DX, though a 486 or better was recommended;<ref>{{cite web |url=http://support.microsoft.com/kb/138349 |title=Windows 95 Installation Requirements |publisher=Microsoft |date=2000-12-17 |website=Microsoft Support |archive-url=https://web.archive.org/web/20041019021615/http://support.microsoft.com/kb/138349 |archive-date=2004-10-19 |access-date=2020-09-01}}</ref> [[Windows 98]] requires a 486DX or higher.<ref>{{cite web |url=http://microsoft.com:80/windows98/guide/Win98/SysReq/default.asp |title=Windows 98 Product Guide: System Requirements |publisher=Microsoft |date=1998-12-04 |website=microsoft.com |access-date=2020-08-31 |archive-url=https://web.archive.org/web/19990420193302/http://microsoft.com/windows98/guide/Win98/SysReq/default.asp |archive-date=April 20, 1999 |url-status=live }}</ref> In the [[Windows NT]] family, [[Windows NT 3.51]] was the last version with 386 support.<ref>{{cite web |url=http://support.microsoft.com/kb/139733/ |title=Windows NT 3.5x Setup Troubleshooting Guide |publisher=Microsoft |website=Microsoft Support |access-date=2020-08-31 |archive-url=https://web.archive.org/web/20070223030314/http://support.microsoft.com/kb/139733/ |archive-date=2007-02-23}}</ref><ref>{{cite web |url=http://microsoft.com/products/prodref/428_sys.htm |title=Windows NT Workstation 4.0 - Requirements |publisher=Microsoft |date=1999-01-29 |website=microsoft.com |access-date=2020-08-31 |archive-url=https://web.archive.org/web/19990202042900/http://microsoft.com/products/prodref/428_sys.htm |archive-date=1999-02-02}}</ref>

[[Debian|Debian GNU/Linux]] dropped 386 support with the release of 3.1 (''Sarge'') in 2005 and completely removed support in 2007 with 4.0 (''Etch'').<ref>{{cite web |url=https://www.debian.org/releases/sarge/i386/release-notes/ch-upgrading.en.html |title=Release Notes for Debian GNU/Linux 3.1 ('sarge'), Intel x86 - Upgrades from previous releases |publisher=The Debian Project |date=June 2005 |website=debian.org |access-date=2020-09-01 |archive-date=May 3, 2023 |archive-url=https://web.archive.org/web/20230503163831/https://www.debian.org/releases/sarge/i386/release-notes/ch-upgrading.en.html |url-status=dead }}</ref><ref>{{Cite web |date=September 16, 2007 |orig-date= |title=Release Notes for Debian GNU/Linux 4.0 ("etch"), Intel x86 |url=https://www.debian.org/releases/etch/i386/release-notes.en.txt |access-date=November 10, 2023 |website=debian.org |publisher=The Debian Project}}</ref> Citing the maintenance burden around [[symmetric multiprocessing|SMP]] primitives, the [[Linux kernel]] developers cut support from the development codebase in December 2012, later released as kernel version 3.8.<ref name="phoronix-linux-drop-support" />

Among the [[Berkeley Software Distribution|BSD]]s, [[FreeBSD]]'s 5.x releases were the last to support the 386; support for the 386SX was cut with release 5.2,<ref>{{cite web |url=https://www.freebsd.org/releases/5.2R/hardware-i386.html |title=FreeBSD/i386 5.2-RELEASE Hardware Notes |publisher=The FreeBSD Project |date=January 2004 |website=freebsd.org |access-date=2020-08-31}}</ref> while the remaining 386 support was removed with the 6.0 release in 2005.<ref>{{cite web |url=https://www.freebsd.org/releases/6.0R/relnotes-i386.html |title=FreeBSD/i386 6.0-RELEASE Release Notes |publisher=The FreeBSD Project |date=November 2005 |website=freebsd.org |access-date=2020-08-31}}</ref> [[OpenBSD]] removed 386 support with version 4.2 (2007),<ref>{{cite web |url=https://www.openbsd.org/plus42.html |title=OpenBSD 4.2 Changelog |publisher=The OpenBSD project |date=November 2007 |website=openbsd.org |access-date=2020-08-31}}</ref> [[DragonFly BSD]] with release 1.12 (2008),<ref>{{cite web |url=https://www.dragonflybsd.org/release112/ |title=DragonFly 1.12.0 Release Notes |publisher=The DragonFly Project |date=2008-02-26 |website=dragonflybsd.org |access-date=2020-08-31}}</ref> and [[NetBSD]] with the 5.0 release (2009).<ref>{{cite web |url=https://www.netbsd.org/releases/formal-5/NetBSD-5.0.html |title=Announcing NetBSD 5.0 |publisher=The NetBSD Foundation |date=April 2009 |website=netbsd.org |access-date=2020-08-31}}</ref>

== See also ==
* [[List of Intel microprocessors]]

==Notes==
{{notelist}}

==References==
{{Reflist|refs=
<ref name="Miller2005p2">A. K. Ray, K. M. Bhurchandi, "Advanced microprocessors and peripherals".</ref>
|2}}

==External links==
* Intel Corporation
**{{cite book |author=Intel Corporation |author-mask=1 |date=1987 |title=Intel 80386 Programmer's Reference Manual 1986 |url=http://css.csail.mit.edu/6.858/2013/readings/i386.pdf}}
**{{cite book |author=Intel Corporation |author-mask=1 |url=https://archive.org/details/bitsavers_intel80386ontothe80386Apr86_12904120 |title=Introduction to the 80386, Including the 80386 Data Sheet |date=April 1986 |id=231630-002}}
**{{cite book |author=Intel Corporation |author-mask=1 |url=https://archive.org/details/bitsavers_inteldataBrocessorsandPeripheralHandbookVolume1_79473179 |series=Microprocessors and Peripheral Handbook |volume=1 |title=Microprocessor |date=October 1987 |id=231630-004 |isbn=1-55512-073-3 |chapter=4. 80386 Microprocessor Family}}
**{{cite book |author=Intel Corporation |author-mask=1 |url=https://archive.org/details/bitsavers_inteldataBrocessorandPeripheralHandbookVol1_114989017 |series=Intel Microprocessor and Peripheral Handbook |volume=1 |title=Microprocessor |chapter=4. INTEL386™ Family |date=November 1988 |id=231630-005 |isbn=1-55512-041-5}}
* [http://www.cpu-world.com/CPUs/80386/ Intel 80386 processor family]
* [http://www.pcjs.org/blog/2015/02/23/ Detailed list of early 80386 steppings (revisions)]
*{{cite web |first=Ken |last=Shirriff |title=Examining the silicon dies of the Intel 386 processor |date=October 2023 |url=http://www.righto.com/2023/10/intel-386-die-versions.html}}
**{{cite web |author-mask=1 |first=Ken |last=Shirriff |title=Reverse engineering the Intel 386 processor's register cell |date=November 2023 |url=http://www.righto.com/2023/11/reverse-engineering-intel-386.html }}
**{{cite web |author-mask=1 |first=Ken |last=Shirriff |title=Inside the Intel 386 processor die: the clock circuit |date=December 2023 |url=http://www.righto.com/2023/11/intel-386-clock-circuit.html}}
**{{cite web |author-mask=1 |first=Ken |last=Shirriff |title=Reverse engineering the barrel shifter circuit on the Intel 386 processor die |date=December 2023 |url=http://www.righto.com/2023/12/386-barrel-shifter.html}}
**{{cite web |author-mask=1 |first=Ken |last=Shirriff |title=The absurdly complicated circuitry for the 386 processor's registers |date=May 2025 |url=http://www.righto.com/2025/05/intel-386-register-circuitry.html}}
**{{cite web |author-mask=1 |first=Ken |last=Shirriff |title=Reverse engineering the 386 processor's prefetch queue circuitry |date=May 2025 |url=http://www.righto.com/2025/05/386-prefetch-circuitry-reverse-engineered.html}}
{{Intel processors|discontinued}}

{{Authority control}}

[[Category:Intel x86 microprocessors|80386]]<!--For the sake of sorting within category-->
[[Category:32-bit microprocessors]]
[[Category:Computer-related introductions in 1985]]
[[Category:X86 microarchitectures]]