Editing Parallel computing (section)

===Bit-level parallelism===
{{main|Bit-level parallelism}}
[[File:Taiwania 3 Supercomputer.jpg|thumb|Taiwania 3 of [[Taiwan]], a parallel supercomputing device that joined [[COVID-19]] research]]
From the advent of [[very-large-scale integration]] (VLSI) computer-chip fabrication technology in the 1970s until about 1986, speed-up in computer architecture was driven by doubling [[Word (data type)|computer word size]]—the amount of information the processor can manipulate per cycle.<ref>{{cite book|last=Singh|first=David Culler; J.P.|title=Parallel computer architecture|year=1997|publisher=Morgan Kaufmann Publ.|location=San Francisco|isbn=978-1-55860-343-1|page=15|edition=[Nachdr.]}}</ref> Increasing the word size reduces the number of instructions the processor must execute to perform an operation on variables whose sizes are greater than the length of the word. For example, where an [[8-bit computing|8-bit]] processor must add two [[16-bit computing|16-bit]] [[integer]]s, the processor must first add the 8&nbsp;lower-order bits from each integer using the standard addition instruction, then add the 8&nbsp;higher-order bits using an add-with-carry instruction and the [[carry bit]] from the lower order addition; thus, an 8-bit processor requires two instructions to complete a single operation, where a 16-bit processor would be able to complete the operation with a single instruction.

Historically, [[4-bit computing|4-bit]] microprocessors were replaced with 8-bit, then 16-bit, then 32-bit microprocessors. This trend generally came to an end with the introduction of 32-bit processors, which has been a standard in general-purpose computing for two decades. Not until the early 2000s, with the advent of [[x86-64]] architectures, did [[64-bit computing|64-bit]] processors become commonplace.