Editing PDP-11 (section)

== LSI-11 ==
[[File:PDP-11 (459312210).jpg|thumb|PDP–11/03 (top right)|289x289px]]
The LSI–11 (PDP–11/03), introduced in February 1975<ref name="16-bit Timeline" /> is the first PDP–11 model produced using [[large-scale integration]]; the entire CPU is contained on four LSI chips made by [[Western Digital]] (the [[MCP-1600]] chip set; a fifth chip can be added to extend the instruction set). It uses a bus which is a close variant of the Unibus called the LSI Bus or [[Q-Bus]]; it differs from the Unibus primarily in that addresses and data are multiplexed onto a shared set of wires rather than having separate sets of wires. It also differs slightly in how it addresses I/O devices and it eventually allowed a 22-bit physical address (whereas the Unibus only allows an 18-bit physical address) and block-mode operations for significantly improved bandwidth (which the Unibus does not support).

The CPU [[microcode]] includes a [[debugger]]: firmware with a direct serial interface ([[RS-232]] or [[current loop]]) to a [[Computer terminal|terminal]]. This lets the operator do [[debugging]] by typing commands and reading [[octal]] numbers, rather than operating switches and reading lights, the typical debugging method at the time. The operator can thus examine and modify the computer's registers, memory, and input/output devices, diagnosing and perhaps correcting failures in software and peripherals (unless a failure disables the microcode itself). The operator can also specify which disk to [[Booting|boot]] from. Both innovations increased the reliability and decreased the cost of the LSI-11.

A [[Writable control store|Writable Control Store]] (WCS) option (KUV11-AA) could be added to the LSI-11. This option allowed programming of the internal 8-bit micromachine to create application-specific extensions to the PDP–11 instruction set. The WCS is a quad Q-Bus board with a ribbon cable connecting to the third microcode ROM socket. The source code for EIS/FIS microcode was included so these instructions, normally located in the third MICROM, could be loaded in the WCS, if desired.<ref>{{cite book |title=LSI-11 WCS user's guide |date=June 1978 |publisher=Digital Equipment Corporation |edition=1st |url=http://www.bitsavers.org/pdf/dec/pdp11/1103/EK-KUV11-TM_LSI11_WCS.pdf |access-date=7 January 2023 |archive-date=23 February 2023 |archive-url=https://web.archive.org/web/20230223212303/http://www.bitsavers.org/pdf/dec/pdp11/1103/EK-KUV11-TM_LSI11_WCS.pdf |url-status=live }}</ref>

Later Q-Bus based systems such as the LSI–11/23, /73, and /83 are based upon chip sets designed in house by Digital Equipment Corporation. Later PDP–11 Unibus systems were designed to use similar Q-Bus processor cards, using a Unibus adapter to support existing Unibus [[peripheral]]s, sometimes with a special memory bus for improved speed.

There were other significant innovations in the Q-Bus lineup. For example, a system variant of the PDP–11/03 introduced full system [[power-on self-test]] (POST).
<gallery>
PDP-11-M7270.jpg|Q-Bus board with LSI-11/2 CPU
KL DEC F11.jpg|DEC "Fonz-11" (F11) Chipset
KL DEC J11.jpg|DEC "Jaws-11" (J11) Chipset
</gallery>