Editing Linear-feedback shift register (section)

== Output-stream properties ==
* Ones and zeroes occur in "runs". The output stream 1110010, for example, consists of four runs of lengths 3, 2, 1, 1, in order. In one period of a maximal LFSR, 2<sup>''n''−1</sup> runs occur (in the example above, the 3-bit LFSR has 4 runs). Exactly half of these runs are one bit long, a quarter are two bits long, up to a single run of zeroes ''n''&nbsp;−&nbsp;1 bits long, and a single run of ones ''n'' bits long. This distribution almost equals the statistical [[Expected value|expectation value]] for a truly random sequence. However, the probability of finding exactly this distribution in a sample of a truly random sequence is rather low{{vague|date=April 2013}}.
* LFSR output streams are [[deterministic]]. If the present state and the positions of the XOR gates in the LFSR are known, the next state can be predicted.<ref name="xilinx.com">{{cite web|url=http://www.xilinx.com/support/documentation/application_notes/xapp052.pdf|title=Efficient Shift Registers, LFSR Counters, and Long Pseudo-Random Sequence Generators|first=Peter|last=Alfke|date=July 7, 1996|work=Xilinx Application Notes, XAPP 052|publisher=AMD Technical Information Portal}}</ref> This is not possible with truly random events. With maximal-length LFSRs, it is much easier to compute the next state, as there are only an easily limited number of them for each length.
* The output stream is reversible; an LFSR with mirrored taps will cycle through the output sequence in reverse order.
* The value consisting of all zeros cannot appear. Thus an LFSR of length ''n'' cannot be used to generate all 2<sup>''n''</sup> values.