Editing IA-64 (section)

=== Architectural changes ===
{{Redirect|Intel VT-i|the x86 virtualization extensions|Intel VT-x}}

Itanium processors released prior to 2006 had hardware support for the [[IA-32]] architecture to permit support for legacy server applications, but performance for IA-32 code was much worse than for native code and also worse than the performance of contemporaneous x86 processors. In 2005, Intel developed the [[IA-32 Execution Layer]] (IA-32 EL), a software emulator that provides better performance. With Montecito, Intel therefore eliminated hardware support for IA-32 code.

In 2006, with the release of [[Montecito (processor)|Montecito]], Intel made a number of enhancements to the basic processor architecture including:<ref>{{cite web|url=http://www.intel.com/products/processor/itanium/index.htm |title=Intel product announcement |access-date=2007-05-16 |work=[[Intel]] web site |url-status=dead |archive-url=https://web.archive.org/web/20071107044019/http://www.intel.com/products/processor/itanium/index.htm |archive-date=November 7, 2007 }}</ref>
* Hardware multithreading: Each processor core maintains context for two threads of execution. When one thread stalls during memory access, the other thread can execute. Intel calls this "coarse multithreading" to distinguish it from the "[[hyper-threading]] technology" Intel integrated into some [[x86]] and [[x86-64]] microprocessors.
* Hardware support for [[hardware-assisted virtualization|virtualization]]: Intel added Intel Virtualization Technology (Intel VT-i), which provides hardware assists for core virtualization functions. Virtualization allows a software "[[hypervisor]]" to run multiple operating system instances on the processor concurrently.
* Cache enhancements: Montecito added a split L2 cache, which included a dedicated 1&nbsp;MB L2 cache for instructions. The original 256&nbsp;KB L2 cache was converted to a dedicated data cache. Montecito also included up to 12&nbsp;MB of on-die L3 cache.