Editing Hardware description language (section)

==High-level synthesis==
{{Main|High-level synthesis}}
In their level of abstraction, HDLs have been compared to [[assembly language]]s.{{citation needed|date=April 2014}} There are attempts to raise the abstraction level of hardware design in order to reduce the complexity of programming in HDLs, creating a sub-field called ''[[high-level synthesis]]''.

Companies such as [[Cadence Design Systems|Cadence]], [[Synopsys]] and Agility Design Solutions are promoting [[SystemC]] as a way to combine high-level languages with concurrency models to allow faster design cycles for [[FPGA]]s than is possible using traditional HDLs. Approaches based on standard [[C (programming language)|C]] or [[C++]] (with libraries or other extensions allowing parallel programming) are found in the [[Catapult C]] tools from [[Mentor Graphics]], and the [[Impulse C]] tools from Impulse Accelerated Technologies.

A similar initiative from Intel is the use of Data Parallel C++, related to [[SYCL]], as a high-level synthesis language.

[https://www.annapmicro.com/ Annapolis Micro Systems], Inc.'s CoreFire Design Suite<ref>{{Cite news|url=https://www.annapmicro.com/products/corefire-next/|title=VHDL-Based FPGA Programming Application Software Tool|work=Annapolis Micro Systems, Inc.|access-date=2018-12-01|language=en-US}}</ref> and [[National Instruments]] LabVIEW FPGA provide a graphical [[dataflow]] approach to high-level design entry and languages such as [[SystemVerilog]], SystemVHDL, and [[Handel-C]] seek to accomplish the same goal, but are aimed at making existing hardware engineers more productive, rather than making FPGAs more accessible to existing [[software engineer]]s.

It is also possible to design hardware modules using [[MATLAB]] and [[Simulink]] using the [[MathWorks]] HDL Coder tool<ref>{{cite web|url=http://www.mathworks.com/products/hdl-coder/ |title=VHDL code - HDL Coder - MATLAB & Simulink |publisher=Mathworks.com |date=2011-04-30 |access-date=2012-08-11}}</ref> or DSP Builder for Intel FPGAs<ref>{{Cite web|title=Digital Signal Processing (DSP) Builder - Intel® FPGAs|url=https://www.intel.com/content/www/us/en/software/programmable/quartus-prime/dsp-builder.html|access-date=2021-09-20|website=Intel|language=en}}</ref> or Xilinx System Generator (XSG) from [[Xilinx]].<ref>{{cite web |url=http://www.xilinx.com/tools/sysgen.htm |title=System Generator for DSP |publisher=Xilinx.com |access-date=2012-08-11 |url-status=dead |archive-url=https://web.archive.org/web/20120712224415/http://www.xilinx.com/tools/sysgen.htm |archive-date=2012-07-12 }}</ref>