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==Pin-compatible upgrades== [[File:KL Upgrade 386.jpg|150px|right|thumb|Typical 386 upgrade CPUs from Cyrix and Texas Instruments]] Intel later offered a modified version of its 486DX in i386 packaging, branded as the Intel [[RapidCAD]]. This provided an upgrade path for users with i386-compatible hardware. The upgrade was a pair of chips that replaced both the i386 and i387. Since the 486DX design contained an [[Floating-point unit|FPU]], the chip that replaced the i386 contained the floating-point functionality, and the chip that replaced the i387 served very little purpose. However, the latter chip was necessary in order to provide the FERR signal to the mainboard and appear to function as a normal floating-point unit. Third parties offered a wide range of upgrades, for both SX and DX systems. The most popular ones were based on the Cyrix 486DLC/SLC core, which typically offered a substantial speed improvement due to its more efficient instruction pipeline and internal [[CPU cache#Multi-level caches|L1]] SRAM cache. The cache was usually 1 KB, or sometimes 8 KB in the TI variant. Some of these upgrade chips (such as the 486DRx2/SRx2) were marketed by Cyrix themselves, but they were more commonly found in kits offered by upgrade specialists such as Kingston, [[Evergreen Technologies]] and Improve-It Technologies. Some of the fastest CPU upgrade modules featured the IBM SLC/DLC family (notable for its 16 KB L1 cache), or even the Intel 486 itself. Many 386 upgrade kits were advertised as being simple drop-in replacements, but often required complicated software to control the cache or clock doubling. Part of the problem was that on most 386 motherboards, the [[A20 line]] was controlled entirely by the motherboard with the CPU being unaware, which caused problems on CPUs with internal caches. Overall, it was very difficult to configure upgrades to produce the results advertised on the packaging, and upgrades were often not very stable or not fully compatible. {{Clear}}
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