Editing Hardware description language (section)

== HDL and programming languages ==

An HDL is grossly similar to a software [[programming language]], but there are major differences. Most programming languages are inherently [[Procedural programming|procedural]] (single-threaded), with limited syntactical and semantic support to handle [[Concurrency (programming)|concurrency]]. HDLs, on the other hand, resemble [[concurrent programming]] languages in their ability to model multiple parallel processes (such as [[flip-flop (electronics)|flip-flops]] and [[adder (electronics)|adders]]) that automatically execute independently of one another. Any change to the process's input automatically triggers an update in the simulator's process stack.

Both programming languages and HDLs are processed by a compiler (often called a synthesizer in the HDL case), but with different goals. For HDLs, "compiling" refers to [[logic synthesis]]; the process of transforming the HDL code listing into a physically realizable gate [[netlist]]. The netlist output can take any of many forms: a "simulation" netlist with gate-delay information, a "handoff" netlist for post-synthesis [[place and route|placement and routing]] on a semiconductor die, or a generic industry-standard [[Electronic Design Interchange Format]] (EDIF) (for subsequent conversion to a [[JEDEC]]-format file).

On the other hand, a software compiler converts the source-code listing into a [[microprocessor]]-specific object code for execution on the target microprocessor. As HDLs and programming languages borrow concepts and features from each other, the boundary between them is becoming less distinct. However, pure HDLs are unsuitable for general purpose [[application software]] development,{{Why|date=December 2018}} just as [[general-purpose programming language]]s are undesirable for modeling hardware.

Yet as electronic systems grow increasingly complex, and [[reconfigurable system]]s become increasingly common, there is growing desire in the industry for a single language that can perform some tasks of both hardware design and software programming. [[SystemC]] is an example of such—[[embedded system]] hardware can be modeled as non-detailed architectural blocks ([[black box]]es with modeled signal inputs and output drivers). The target application is written in C or C++ and natively compiled for the host-development system; as opposed to targeting the embedded CPU, which requires host-simulation of the embedded CPU or an emulated CPU.

The high level of abstraction of SystemC models is well suited to early [[Design space exploration|architecture exploration]], as architectural modifications can be easily evaluated with little concern for signal-level implementation issues. However, the threading model used in SystemC relies on [[shared memory]], causing the language not to handle parallel execution or low-level models well.