Editing Hamming code (section)

== {{Anchor|SECDED}}Hamming codes with additional parity (SECDED) ==
Hamming codes have a minimum distance of 3, which means that the decoder can detect and correct a single error, but it cannot distinguish a double bit error of some codeword from a single bit error of a different codeword.  Thus, some double-bit errors will be incorrectly decoded as if they were single bit errors and therefore go undetected, unless no correction is attempted.

To remedy this shortcoming, Hamming codes can be extended by an extra parity bit. This way, it is possible to increase the minimum distance of the Hamming code to 4, which allows the decoder to distinguish between single bit errors and two-bit errors. Thus the decoder can detect and correct a single error and at the same time detect (but not correct) a double error.

If the decoder does not attempt to correct errors, it can reliably detect triple bit errors. If the decoder does correct errors, some triple errors will be mistaken for single errors and "corrected" to the wrong value. Error correction is therefore a trade-off between certainty (the ability to reliably detect triple bit errors) and resiliency (the ability to keep functioning in the face of single bit errors).

This extended Hamming code was popular in computer memory systems, starting with [[IBM 7030 Stretch]] in 1961,{{sfn|Kythe|Kythe|2017|p=115}} where it is known as ''SECDED'' (or SEC-DED, abbreviated from ''single error correction, double error detection'').{{sfn|Kythe|Kythe|2017|p=95}} Server computers in 21st century, while typically keeping the SECDED level of protection, no longer use Hamming's method, relying instead on the designs with longer codewords (128 to 256 bits of data) and modified balanced parity-check trees.{{sfn|Kythe|Kythe|2017|p=115}} The (72,64) Hamming code is still popular in some hardware designs, including [[Xilinx]] [[FPGA]] families.{{sfn|Kythe|Kythe|2017|p=115}}