Editing List of Intel processors (section)

===32-bit processors: [[NetBurst]] microarchitecture===

====[[Pentium 4]]====
* 0.18&nbsp;μm process technology (1.40 and 1.50&nbsp;GHz)
** Introduced November 20, 2000
** L2&nbsp;cache was 256&nbsp;KB Advanced Transfer cache (integrated)
** Processor package Style was PGA423, PGA478
** System bus clock rate 400&nbsp;MHz
** [[SSE2]] [[SIMD]] Extensions
** 42 million transistors
** Used in desktops and entry-level workstations
* 0.18&nbsp;μm process technology (1.7&nbsp;GHz)
** Introduced April 23, 2001
** See the 1.4 and 1.5 chips for details
* 0.18&nbsp;μm process technology (1.6 and 1.8&nbsp;GHz)
** Introduced July 2, 2001
** See 1.4 and 1.5 chips for details
** Core voltage is 1.15 volts in Maximum Performance Mode; 1.05 volts in battery optimized mode
** Power <1&nbsp;watt in battery optimized mode
** Used in full-size and then light mobile PCs
* 0.18&nbsp;μm process technology '''Willamette''' (1.9 and 2.0&nbsp;GHz)
** Introduced August 27, 2001
** See 1.4 and 1.5 chips for details
* Family 15 model 1
* Pentium 4 (2&nbsp;GHz, 2.20&nbsp;GHz)
** Introduced January 7, 2002
* Pentium 4 (2.4&nbsp;GHz)
** Introduced April 2, 2002
* 0.13&nbsp;μm process technology '''Northwood A''' (1.7, 1.8, 1.9, 2, 2.2, 2.4, 2.5, 2.6, 2.8 (OEM), 3.0 (OEM) GHz)
** Improved branch prediction and other microcodes tweaks
** 512&nbsp;KB integrated L2&nbsp;cache
** 55 million transistors
** 400&nbsp;MHz system bus
* Family 15 model 2
* 0.13&nbsp;μm process technology '''Northwood B''' (2.26, 2.4, 2.53, 2.66, 2.8, 3.06&nbsp;GHz)
** 533&nbsp;MHz system bus. (3.06 includes Intel's [[Hyper-Threading]] technology)
* 0.13&nbsp;μm process technology '''Northwood C''' (2.4, 2.6, 2.8, 3.0, 3.2, 3.4&nbsp;GHz)
** 800&nbsp;MHz system bus (all versions include Hyper-Threading)
** 6500 to 10,000&nbsp;MIPS

'''Itanium''' ''(chronological entry – new non-x86 architecture)''
{{see also|#Itanium}}
* Introduced 2001

====[[Xeon]] (32-bit NetBurst)====
* Official designation now Xeon; i.e. not "Pentium 4 Xeon"
* Xeon 1.4, 1.5, 1.7&nbsp;GHz
** Introduced May 21, 2001
** L2&nbsp;cache was 256&nbsp;KB Advanced Transfer cache (integrated)
** Processor package [[Organic Land Grid Array]] 603 (OLGA 603)
** System bus clock rate 400&nbsp;MHz
** SSE2 SIMD Extensions
** Used in high-performance and mid-range dual processor enabled workstations
* Xeon 2.0&nbsp;GHz and up to 3.6&nbsp;GHz
** Introduced September 25, 2001

'''Itanium 2''' ''(chronological entry – new non-x86 architecture)''
* Introduced July 2002
* ''See [[#Itanium|main entry]]''

====Mobile Pentium 4-M====
* 0.13&nbsp;μm process technology
* 55 million transistors
* 512&nbsp;KB L2&nbsp;cache
* BUS a 400&nbsp;MHz
* Supports up to 1&nbsp;GB of [[double data rate|DDR]] 266&nbsp;MHz memory
* Supports [[Advanced Configuration and Power Interface|ACPI]] 2.0 and [[Advanced Power Management|APM]] 1.2 System Power Management
* 1.3–1.2&nbsp;V ([[SpeedStep]])
* Power: 1.2&nbsp;GHz 20.8&nbsp;W, 1.6&nbsp;GHz 30&nbsp;W, 2.6&nbsp;GHz 35&nbsp;W
* Sleep power 5&nbsp;W (1.2&nbsp;V)
* Deeper sleep power 2.9&nbsp;W (1.0&nbsp;V)
** 1.40&nbsp;GHz – 23 April 2002
** 1.50&nbsp;GHz – 23 April 2002
** 1.60&nbsp;GHz – 4 March 2002
** 1.70&nbsp;GHz – 4 March 2002
** 1.80&nbsp;GHz – 23 April 2002
** 1.90&nbsp;GHz – 24 June 2002
** 2.00&nbsp;GHz – 24 June 2002
** 2.20&nbsp;GHz – 16 September 2002
** 2.40&nbsp;GHz – 14 January 2003
** 2.50&nbsp;GHz – 16 April 2003
** 2.60&nbsp;GHz – 11 June 2003

====[[P4EE|Pentium 4 EE]]====
* Introduced September 2003
* "Extreme Edition"
* Built from the Xeon's "Gallatin" core, but with 2&nbsp;MB&nbsp;cache

====Pentium 4E====
* Introduced February 2004
* Built on 0.09&nbsp;μm ([[90 nanometer|90&nbsp;nm]]) process technology '''Prescott''' (2.4&nbsp;A, 2.8, 2.8&nbsp;A, 3.0, 3.2, 3.4, 3.6, 3.8 <!--skip As and end with aperage?-->) 1&nbsp;MB L2&nbsp;cache
* 533&nbsp;MHz system bus (2.4A and 2.8A only)
* 800&nbsp;MHz system bus (all other models)
* 125 million transistors in 1&nbsp;MB models
* 169 million transistors in 2&nbsp;MB models
* [[Hyper-Threading]] support is only available on CPUs using the 800&nbsp;MHz system bus.
* The processor's integer [[pipeline (computing)|instruction pipeline]] has been increased from 20 stages to 31 stages, which theoretically allows for even greater bandwidth
* 7500 to 11,000&nbsp;MIPS
* [[LGA 775]] versions are in the 5xx series (32-bit) and 5''x''1 series (with Intel 64)
* The 6xx series has 2&nbsp;MB L2&nbsp;cache and [[Intel 64]]