Jump to content
Main menu
Main menu
move to sidebar
hide
Navigation
Main page
Recent changes
Random page
Help about MediaWiki
Special pages
Niidae Wiki
Search
Search
Appearance
Create account
Log in
Personal tools
Create account
Log in
Pages for logged out editors
learn more
Contributions
Talk
Editing
List of Intel processors
(section)
Page
Discussion
English
Read
Edit
View history
Tools
Tools
move to sidebar
hide
Actions
Read
Edit
View history
General
What links here
Related changes
Page information
Appearance
move to sidebar
hide
Warning:
You are not logged in. Your IP address will be publicly visible if you make any edits. If you
log in
or
create an account
, your edits will be attributed to your username, along with other benefits.
Anti-spam check. Do
not
fill this in!
====Pentium II [[Xeon]] and Pentium III Xeon==== * PII Xeon ** Variants *** 400 MHz introduced June 29, 1998 *** 450 MHz (512 KB L2 cache) introduced October 6, 1998 *** 450 MHz (1 MB and 2 MB L2 cache) introduced January 5, 1999 * PIII Xeon ** Introduced October 25, 1999 ** 9.5 million transistors at 0.25 μm or 28 million at 0.18 μm ** L2 cache is 256 KB, 1 MB, or 2 MB Advanced Transfer Cache (Integrated) ** Processor Package Style is Single Edge Contact Cartridge (S.E.C.C.2) or SC330 ** System Bus clock rate 133 MHz (256 KB L2 cache) or 100 MHz (1–2 MB L2 cache) ** System Bus width: 64 bits ** Addressable memory: 64 GB ** Used in two-way servers and workstations (256 KB L2) or 4- and 8-way servers (1–2 MB L2) ** Family 6 model 10 ** Variants *** 500 MHz ([[250 nanometer|0.25 μm process]]) introduced March 17, 1999 *** 550 MHz (0.25 μm process) introduced August 23, 1999 *** 600 MHz ([[180 nanometer|0.18 μm process]], 256 KB L2 cache) introduced October 25, 1999 *** 667 MHz (0.18 μm process, 256 KB L2 cache) introduced October 25, 1999 *** 733 MHz (0.18 μm process, 256 KB L2 cache) introduced October 25, 1999 *** 800 MHz (0.18 μm process, 256 KB L2 cache) introduced January 12, 2000 *** 866 MHz (0.18 μm process, 256 KB L2 cache) introduced April 10, 2000 *** 933 MHz (0.18 μm process, 256 KB L2 cache) *** 1000 MHz (0.18 μm process, 256 KB L2 cache) introduced August 22, 2000 *** 700 MHz (0.18 μm process, 1–2 MB L2 cache) introduced May 22, 2000
Summary:
Please note that all contributions to Niidae Wiki may be edited, altered, or removed by other contributors. If you do not want your writing to be edited mercilessly, then do not submit it here.
You are also promising us that you wrote this yourself, or copied it from a public domain or similar free resource (see
Encyclopedia:Copyrights
for details).
Do not submit copyrighted work without permission!
Cancel
Editing help
(opens in new window)
Search
Search
Editing
List of Intel processors
(section)
Add topic