Editing Static random-access memory (section)

===Hobbyists===
Hobbyists, specifically home-built processor enthusiasts,<ref>{{Cite web|url=https://3.14.by/en/read/homemade-cpus|title=Homemade CPU – from scratch : Svarichevsky Mikhail|website=3.14.by}}</ref> often prefer SRAM due to the ease of interfacing. It is much easier to work with than DRAM as there are no refresh cycles and the address and data buses are often directly accessible.{{Citation needed|date=May 2024}} In addition to buses and power connections, SRAM usually requires only three controls: Chip Enable (CE), Write Enable (WE) and Output Enable (OE). In synchronous SRAM, Clock (CLK) is also included.<ref>{{cite web |url=https://www.eeherald.com/section/design-guide/esmod15.html |title=Embedded Systems Course- module 15: SRAM memory interface to microcontroller in embedded systems |access-date=2024-04-12}}</ref>