Editing Counter (digital) (section)

==Common types==

===Binary counter <span class="anchor" id="Binary counter"></span>===

A '''binary counter''' is a digital counter that directly represents the count as a binary number. A binary counter is a MOD-{{math|2<sup>''n''</sup>}} counter, where ''n'' is the number of flip-flops used to store the count. For example, the illustrations below show the behavior of a 5-bit binary counter, which has 32 ({{math|2<sup>5</sup>}}) states and is therefore a MOD-32 counter:

<gallery widths="350px">
File:Binary counter.gif|Count sequence of a 5-bit binary up-counter
File:Bin counter timing d.jpg|Voltage changes on the outputs of a 5-bit binary counter as it counts up from 0 to 31 (left to right), with most-significant bit on top row and successively less-significant bits in the rows below
</gallery>

====Asynchronous binary counter====

An asynchronous binary counter, or binary ripple counter, is a "chain" of toggle (T) flip-flops in which the least-significant flip-flop (bit 0) is clocked by an external signal (the counter input clock), and all other flip-flops are clocked by the output of the nearest, less significant flip-flop (e.g., bit 0 clocks the bit 1 flip-flop, bit 1 clocks bit 2, etc.). When implemented with discrete flip-flops, ripple counters are commonly implemented with [[Flip-flop (electronics)#JK flip-flop|JK flip-flops]], with each flip-flop configured to toggle when clocked (i.e., J and K are both connected to logic high).

[[File:Async counter JK nbit.svg|400px|border|Schematic diagram of an n-bit ripple counter constructed from [[JK flip flop]]s. In this counter, the first flip-flop is clocked by rising edges; all other flip-flops in the chain are clocked by falling clock edges.]]

Each flip-flop is effectively a one-bit counter which increments its count (by toggling its output) once per clock cycle. It counts from zero to one and then, when the next clock arrives, it will overflow and start its count sequence over again at zero. Each output state persists for a full input clock cycle, and consequently the frequency of each flip-flop's output signal is exactly half that of its input clock. Additional flip-flops may be added to the chain to form a counter of any arbitrary word size (number of bits), with the output frequency of each bit equal to exactly half the frequency of its nearest, less significant bit.

<gallery heights="160px" widths="350px">
File:4020 Functional Diagram.svg|Functional diagram of a CMOS 4020, 14-bit ripple counter IC
File:RCA CD74HC4020E.jpg|Photograph of a CMOS 4020, 14-bit ripple counter IC ([[RCA]] CD74HC4020E)
</gallery>

====Synchronous binary counter====

The circuit shown below is a synchronous, up-counting four-bit binary counter implemented with JK flip-flops. Upon clock rising edge, bit 0 will always toggle, whereas other bits will toggle only when all less-significant bits are at a logic high state (i.e., Q1 toggles if Q0 is logic high; Q2 toggles if Q0 and Q1 are both high; and Q3 toggles if Q0, Q1, and Q2 are all high).

[[File:4 bit binary synchronous counter.svg|400px|border|Synchronous 4-bit binary counter using JK flip-flops]]

As in asynchronous counters, each flip-flop introduces a delay from input clock edge to output toggle, but in this case all flip-flops change state concurrently, and consequently the counter output will settle after only one flip-flop delay regardless of the number of bits.

===BCD decade counter===

A [[binary-coded decimal]] (BCD) decade counter is a MOD-10 counter that directly represents the count as a binary number in the range 0 to 9. Typically a BCD decade counter will count up from 0 to 9 and then overflow. Because their output value range is identical to that of a decimal digit, BCD decade counters are commonly used to represent decimal digits.

{|class="wikitable" style="text-align:center"
|-
! colspan="5"|BCD decade counter output states
|-
! | State || Q0 || Q1 || Q2 || Q3
|-
! 0
| 0 || 0 || 0 || 0
|-
! 1
| style="background:#0FF"|1 || 0 || 0 || 0
|-
! 2
| 0 || style="background:#0FF"|1 || 0 || 0
|-
! 3
| style="background:#0FF"|1 || style="background:#0FF"|1 || 0 || 0
|-
! 4
| 0 || 0 || style="background:#0FF"|1 || 0
|-
! 5
| style="background:#0FF"|1 || 0 || style="background:#0FF"|1 || 0
|-
! 6
| 0 || style="background:#0FF"|1 || style="background:#0FF"|1 || 0
|-
! 7
| style="background:#0FF"|1 || style="background:#0FF"|1 || style="background:#0FF"|1 || 0
|-
! 8
| 0 || 0 || 0 || style="background:#0FF"|1
|-
! 9
| style="background:#0FF"|1 || 0 || 0 || style="background:#0FF"|1
|}

====Asynchronous BCD decade counter====

The circuit shown below is an asynchronous BCD decade counter. It is effectively a 4-bit binary ripple counter that uses a NAND gate to reset the count to zero (by resetting all flip-flops) when the binary count increments to 10 (binary 1010), thus resulting in 10 output states. As in all asynchronous counters, the stored count is unstable while the external clock propagates through the flip-flop chain (including the reset upon reaching count 10).

[[File:DecadeCounter.jpg|450px|border|An integrated circuit BCD decade counter using JK Flip-flops (74LS112D)]]

====Synchronous BCD decade counter====

The circuit shown below is a synchronous BCD decade counter. Five logic gates are used to implement the next-state logic, thus facilitating faster operation than an asynchronous counter at the expense of additional circuitry.

[[File:4-bit BCD synchronous counter.svg|450px|border|Synchronous BCD decade counter]]

===Ring counter===

A [[ring counter]] is a [[circular shift register]] which is initialized (via its reset input signal) such that one flip-flop (typically bit 0) stores a ‘1’ and all other flip-flops store a ‘0’. Each clock pulse causes the ‘1’ to shift to the next flip-flop. When the ‘1’ reaches the last flip-flop in the shift register, the next clock causes it to shift into the first flip-flop, thus restarting the counting sequence and effecting a counter overflow. At any particular time only one counter output bit is logic ‘1’, and consequently a ring counter is effectively a [[one-hot]] [[state machine]].

A ring counter is MOD-n, where n is the number of flip-flops. For example, the ring counter shown below has four flip-flops and therefore is a MOD-4 counter. In this counter, bit 0 is initially set and all other bits are cleared.

[[File:Overbeck Counter 4bit.svg|400px|border|4-bit ring counter with synchronous reset input, which initializes bit 0 to ‘1’ and all other bits to ‘0’]]

{|class="wikitable" style="text-align:center"
|-
! colspan="5"|4-bit ring counter output states
|-
! | Count || Q0 || Q1 || Q2 || Q3
|-
! 0
| style="background:#0FF"|1 ||0 || 0 || 0
|-
! 1
| 0 || style="background:#0FF"|1 || 0 || 0
|-
! 2
| 0 || 0 || style="background:#0FF"|1 || 0
|-
! 3
| 0 || 0 || 0 || style="background:#0FF"|1
|}

===Johnson counter===

A [[Johnson counter]] is a circular shift register in which the output of the last stage is inverted and connected to the data input of the first stage,<ref>{{cite book | title = Digital Principles Foundation of Circuit Design and Application | first = Arun Kumar | last = Singh | publisher =  New Age Publishers | year = 2006 | isbn = 81-224-1759-0 | url = https://books.google.com/books?id=13Wi37h2A-oC&q=switchtail+ring+counter+johnson&pg=PA113}}</ref><ref>{{cite book | title = The Art of Electronics | first1 = Paul | last1 = Horowitz | first2 = Winfield | last2 = Hill | publisher = Cambridge University Press | year = 1989 | isbn = 0-521-37095-7 | url = https://books.google.com/books?id=bkOMDgwFA28C&q=ring+counter+walking&pg=PA667}}</ref><ref>{{cite book | title = Modern Dictionary of Electronics | first = Rudolf F | last = Graf | publisher = Newnes | year = 1999 | isbn = 0-7506-9866-7 | url = https://books.google.com/books?id=uah1PkxWeKYC&q=moebius+ring+counter+johnson&pg=PA401}}</ref> and all bits are initialized to zero, thus producing a [[Gray code]] output sequence. It can be clocked at relatively high frequencies because there are no intermediate logic gates, and consequently the worst-case propagation delay is from clock to flip-flop output. A Johnson counter is MOD-2n, where n is the number of flip-flops. For example, the Johnson counter shown below has four flip-flops and therefore is a MOD-8 counter.

[[File:Johnson Counter 4bit.svg|400px|border|4-bit Johnson counter using four [[Flip-flop (electronics)#D flip-flop|D-type flip flops]]]]

{|class="wikitable" style="text-align:center"
|-
! colspan="5"|4-bit Johnson counter output states
|-
! | State || Q0 || Q1 || Q2 || Q3
|-
! 0
| 0 || 0 || 0 || 0
|-
! 1
| style="background:#0FF"|1 || 0 || 0 || 0
|-
! 2
| style="background:#0FF"|1 || style="background:#0FF"|1 || 0 || 0
|-
! 3
| style="background:#0FF"|1 || style="background:#0FF"|1 || style="background:#0FF"|1 || 0
|-
! 4
| style="background:#0FF"|1 || style="background:#0FF"|1 || style="background:#0FF"|1 || style="background:#0FF"|1
|-
! 5
| 0 || style="background:#0FF"|1 || style="background:#0FF"|1 || style="background:#0FF"|1
|-
! 6
| 0 || 0 || style="background:#0FF"|1 || style="background:#0FF"|1
|-
! 7
| 0 || 0 || 0 || style="background:#0FF"|1
|}

Johnson counters are commonly used in state machines and in specialized applications such as analog waveform generation (e.g., Davies sinusoidal generator).<ref name="davies">{{cite web |last1=Dunbar |first1=Steven |title=The Davies Sinusoidal Generator |url=https://www.ti.com/lit/an/sboa550/sboa550.pdf |publisher=Texas Instruments |access-date=27 March 2025}}</ref>