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====[[Pentium II]]==== * Introduced May 7, 1997 * Pentium Pro with [[MMX (instruction set)|MMX]] and improved [[16-bit computing|16-bit]] performance * 242-pin [[Slot 1]] (SEC) processor package * Voltage identification pins * 7.5 million transistors * 32 KB L1 cache * 512 KB {{frac|1|2}} frequency external L2 cache * The ''Performance Enhanced'' mobile Pentium II (codenamed Dixon) had a full-speed 256 KB L2 cache * '''Klamath''' β [[350 nanometer|0.35 ΞΌm process technology]] (233, 266, 300 MHz) ** 66 MHz system bus clock rate ** Family 6 model 3 ** Variants *** 233, 266, 300 MHz introduced May 7, 1997 * '''Deschutes''' β [[250 nanometer|0.25 ΞΌm process technology]] (333, 350, 400, 450 MHz) ** Introduced January 26, 1998 ** 66 MHz system bus clock rate (''333 MHz variant''), 100 MHz system bus clock rate for all subsequent models ** Family 6 model 5 ** Variants *** 333 MHz introduced January 26, 1998 *** 350, 400 MHz introduced April 15, 1998 *** 450 MHz introduced August 24, 1998 *** 233, 266 MHz (Mobile) introduced April 2, 1998 *** 333 MHz Pentium II Overdrive processor for Socket 8 Introduced August 10, 1998 *** 300 MHz (Mobile) introduced September 9, 1998 *** 333 MHz (Mobile) introduced January 25, 1999
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