Editing List of Intel processors (section)

===32-bit processors: [[P5 (microarchitecture)|P5]] microarchitecture===
<!--P5 family-->[[File:KL Intel Pentium P5.jpg|thumb|Intel Pentium P5 (A80501) 60&nbsp;MHz, without GoldCap]]
[[File:KL Intel Pentium A80501.jpg|thumb|Intel Pentium P5 (A80501) 66&nbsp;MHz, with GoldCap]]

====Original [[Pentium (original)|Pentium]]====
* Introduced March 22, 1993
* Bus width: 64 bits
* System bus clock rate 60 or 66&nbsp;MHz
* Address bus: 32 bits
* Addressable memory 4&nbsp;GB
* Virtual memory 64&nbsp;TB
* [[Superscalar]] architecture
* Runs on 3.3 volts (except the very first generation "P5")
* Used in desktops
* 8&nbsp;KB of instruction [[CPU cache|cache]]
* 8&nbsp;KB of data&nbsp;cache
* P5 – [[800 nanometer|0.8&nbsp;μm process technology]]
** Introduced March 22, 1993
** 3.1 million transistors
** The only Pentium to run on 5 Volts
** [[Socket 4]] 273 pin PGA Package
** Package dimensions 2.16&nbsp;in × 2.16&nbsp;in
** Family 5 model 1
** Variants
*** 60&nbsp;MHz, 100&nbsp;MIPS (70.4 SPECint92, 55.1 SPECfp92 on Xpress 256&nbsp;KB L2)
*** 66&nbsp;MHz, 112&nbsp;MIPS (77.9 SPECint92, 63.6 SPECfp92 on Xpress 256&nbsp;KB L2)
* P54 – [[600 nanometer|0.6&nbsp;μm process technology]]
** [[Socket 5]] 296/320-pin PGA package
** 3.2 million transistors
** Variants
*** 75&nbsp;MHz, 126.5&nbsp;MIPS (2.31 SPECint95, 2.02 SPECfp95 on Gateway P5 256K L2)
**** Introduced October 10, 1994
*** 90, 100&nbsp;MHz, 149.8 and 166.3&nbsp;MIPS respectively (2.74 SPECint95, 2.39 SPECfp95 on Gateway P5 256K L2 and 3.30 SPECint95, 2.59 SPECfp95 on Xpress 1ML2 respectively)
**** Introduced March 7, 1994
* P54CQS – [[350 nanometer|0.35&nbsp;μm process technology]]
** [[Socket 5]] 296/320 pin PGA package
** 3.2 million transistors
** Variants
*** 120&nbsp;MHz, 203&nbsp;MIPS (3.72 SPECint95, 2.81 SPECfp95 on Xpress 1&nbsp;MB L2)
**** Introduced March 27, 1995
*[[File:Intel Pentium 133.jpg|thumb|Intel Pentium P54 133&nbsp;MHz]]P54CS – [[350 nanometer|0.35&nbsp;μm process technology]]
** 3.3 million transistors
** 90&nbsp;mm<sup>2</sup> die size
** Family 5 model 2
** Variants
** [[Socket 5]] 296/320-pin PGA package
*** 133&nbsp;MHz, 218.9&nbsp;MIPS (4.14 SPECint95, 3.12 SPECfp95 on Xpress 1&nbsp;MB L2)
**** Introduced June 12, 1995
*** 150, 166&nbsp;MHz, 230 and 247&nbsp;MIPS respectively
**** Introduced January 4, 1996
** [[Socket 7]] 296/321-pin PGA package
*** 200&nbsp;MHz, 270&nbsp;MIPS (5.47 SPECint95, 3.68 SPECfp95)
**** Introduced June 10, 1996

[[File:KL Intel Pentium MMX.jpg|thumb|Intel Pentium P55C 166&nbsp;MHz]]

====[[Pentium MMX|Pentium with MMX Technology]]====
* P55C – [[350 nanometer|0.35&nbsp;μm process technology]]
** Introduced January 8, 1997
** Intel [[MMX (instruction set)]] support
** [[Socket 7]] 296/321 pin PGA (pin grid array) package
** 16&nbsp;KB L1 instruction&nbsp;cache
** 16&nbsp;KB data&nbsp;cache
** 4.5 million transistors
** System bus clock rate 66&nbsp;MHz
** Basic P55C is family 5 model 4, mobile are family 5 model 7 and 8
** Variants
*** 166, 200&nbsp;MHz introduced January 8, 1997
*** 233&nbsp;MHz introduced June 2, 1997
*** 133&nbsp;MHz (Mobile)
*** 166, 266&nbsp;MHz (Mobile) introduced January 12, 1998
*** 200, 233&nbsp;MHz (Mobile) introduced September 8, 1997
*** 300&nbsp;MHz (Mobile) introduced January 7, 1999