Editing Transistor–transistor logic (section)

== Interfacing considerations ==
Like DTL, TTL is a ''current-sinking logic'' since a current must be drawn from inputs to bring them to a logic 0 voltage level. The driving stage must absorb up to 1.6 mA from a standard TTL input while not allowing the voltage to rise to more than 0.4 volts.<ref>[http://focus.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn74ls00&fileType=pdf&track=no SN7400 datasheet] - Texas Instruments</ref> The output stage of the most common TTL gates is specified to function correctly when driving up to 10 standard input stages (a fanout of 10). TTL inputs are sometimes simply left floating to provide a logical "1", though this usage is not recommended.<ref>{{cite web |last1=Haseloff |first1=Eilhard |title=Designing With Logic |url=http://www.ti.com/lit/an/sdya009c/sdya009c.pdf |archive-url=https://web.archive.org/web/20111024154919/http://www.ti.com/lit/an/sdya009c/sdya009c.pdf |archive-date=2011-10-24 |url-status=live |website=TI.com |publisher=Texas Instruments Incorporated |access-date=27 October 2018 |pages=6–7 }}</ref>

Standard TTL circuits operate with a 5-[[volt]] power supply.  A TTL input signal is defined as "low" when between 0&nbsp;V and 0.8&nbsp;V with respect to the ground terminal, and "high" when between 2&nbsp;V and V<sub>CC</sub> (5&nbsp;V),<ref>[[Logic level#Logic voltage levels|TTL logic levels]]</ref><ref name="DM7490A">{{cite web|title=DM7490A Decade and Binary Counter|url=http://socrates.berkeley.edu/~phylabs/bsc/PDFFiles/DM7490A.pdf |archive-url=https://web.archive.org/web/20050323080215/http://socrates.berkeley.edu/~phylabs/bsc/PDFFiles/DM7490A.pdf |archive-date=2005-03-23 |url-status=live|publisher=Fairchild|access-date=14 October 2016}}</ref> and if a voltage signal ranging between 0.8&nbsp;V and 2.0&nbsp;V is sent into the input of a TTL gate, there is no certain response from the gate and therefore it is considered "uncertain" (precise logic levels vary slightly between sub-types and by temperature).  TTL outputs are typically restricted to narrower limits of between 0.0&nbsp;V and 0.4&nbsp;V for a "low" and between 2.4&nbsp;V and V<sub>CC</sub> for a "high", providing at least 0.4&nbsp;V of [[Noise (electronics)|noise immunity]].  Standardization of the TTL levels is so ubiquitous that complex circuit boards often contain TTL chips made by many different manufacturers selected for availability and cost, compatibility being assured. Two circuit board units off the same assembly line on different successive days or weeks might have a different mix of brands of chips in the same positions on the board; repair is possible with chips manufactured years later than original components.  Within usefully broad limits, logic gates can be treated as ideal Boolean devices without concern for electrical limitations. The 0.4 V noise margins are adequate because of the low output impedance of the driver stage, that is, a large amount of noise power superimposed on the output is needed to drive an input into an undefined region.

In some cases (e.g., when the output of a TTL logic gate needs to be used for driving the input of a CMOS gate), the voltage level of the "totem-pole" output stage at output logical "1" can be increased closer to V<sub>CC</sub> by connecting an external resistor between the V4 collector and the positive rail. It [[pull-up resistor|pulls up]] the V<sub>5</sub> cathode and cuts-off the diode.<ref>{{Cite web|url=http://ecelab.com/interfacing-ttl-cmos.htm|archiveurl=https://web.archive.org/web/20100919223820/http://ecelab.com/interfacing-ttl-cmos.htm|url-status=dead|website=ecelab.com|title=ecelab Resources and Information.|archivedate=19 September 2010|accessdate=13 March 2023}}</ref> However, this technique actually converts the sophisticated "totem-pole" output into a simple output stage having significant output resistance when driving a high level (determined by the external resistor).