Editing StrongARM (section)

==SA-1500==
The SA-1500 was a derivative of the SA-110 developed by DEC initially targeted for [[set-top box]]es.<ref>Rick Boyd-Merrit; Peter Clarke (24 July 1998). [http://www.eetimes.com/news/98/1018news/strongarm.html "Intel to reveal details on StrongARM chip"]. ''[[EE Times]]''.</ref><ref>Prashant P. Gandhi (18 August 1998). [http://www.hotchips.org/archives/hc10/3_Tue/HC10.S8/HC10.8.3.pdf "SA-1500: A 300&nbsp;MHz RISC CPU with Attached Media Processor"] {{Webarchive|url=https://web.archive.org/web/20081120010823/http://www.hotchips.org/archives/hc10/3_Tue/HC10.S8/HC10.8.3.pdf |date=20 November 2008 }}. [[Hot Chips|Hot Chips&nbsp;10]].</ref> It was designed and manufactured in low volumes by DEC but was never put into production by Intel. The SA-1500 was available at 200 to 300&nbsp;MHz. The SA-1500 featured an enhanced SA-110 core, an on-chip [[coprocessor]] called the ''Attached Media Processor'' (AMP), and an on-chip SDRAM and I/O bus controller. The SDRAM controller supported 100&nbsp;MHz SDRAM, and the I/O controller implemented a 32-bit I/O bus that may run at frequencies up to 50&nbsp;MHz for connecting to peripherals and the SA-1501 companion chip.

The AMP implemented a long-instruction-word instruction set containing instructions designed for multimedia, such as integer and floating-point [[multiply–accumulate operation]]s and [[single instruction, multiple data|SIMD]] arithmetic. Each long-instruction word is 64&nbsp;bits wide and specifies an arithmetic operation and a branch or a load/store. Instructions operate on operands from a 64-entry 36-bit register file, and on a set of control registers. The AMP communicates with the SA-110 core via an on-chip bus and it shares the data cache with the SA-110. The AMP contained an ALU with a shifter, a branch unit, a load/store unit, a multiply–accumulate unit, and a [[single-precision floating-point format|single-precision]] [[floating-point unit]]. The AMP supported user-defined instructions via a 512-entry writable control store.<ref name="microprocessorreport19971208_sa1500">{{ cite magazine | url=https://www.cecs.uci.edu/~papers/mpr/MPR/19971208/111603.pdf | title=StrongARM-1500 Grapples With MPEG-2 | magazine=[[Microprocessor Report]] | last1=Turley | first1=Jim | date=8 December 1997 | access-date=14 March 2024 }}</ref>

The SA-1501 companion chip provided additional video and audio processing capabilities and various I/O functions such as PS/2 ports, a parallel port, and interfaces for various peripherals.

The SA-1500 contains 3.3 million transistors and measures 60&nbsp;mm<sup>2</sup>. It was fabricated in a 0.28&nbsp;μm CMOS process. It used a 1.5 to 2.0&nbsp;V internal power supply and 3.3&nbsp;V I/O, consuming less than 0.5&nbsp;W at 100&nbsp;MHz and 2.5&nbsp;W at 300&nbsp;MHz. It was packaged in a 240-pin metal [[quad flat package]] or a 256-ball [[PBGA|plastic ball grid array]].