Editing Multiprocessing (section)

====Tightly coupled multiprocessor system====
Tightly coupled multiprocessor systems contain multiple CPUs that are connected at the bus level.  These CPUs may have access to a central shared memory (SMP or [[Uniform Memory Access|UMA]]), or may participate in a memory hierarchy with both local and shared memory (SM)([[non-uniform memory access|NUMA]]). The [[IBM p690]] Regatta is an example of a high end SMP system. [[Intel]] [[Xeon]] processors dominated the multiprocessor market for business PCs and were the only major x86 option until the release of [[AMD]]'s [[Opteron]] range of processors in 2004. Both ranges of processors had their own onboard cache but provided access to shared memory; the Xeon processors via a common pipe and the Opteron processors via independent pathways to the system [[Random-access memory|RAM]].

Chip multiprocessors, also known as [[Multi-core (computing)|multi-core]] computing, involves more than one processor placed on a single chip and can be thought of the most extreme form of tightly coupled multiprocessing. Mainframe systems with multiple processors are often tightly coupled.