Editing MIPS architecture (section)

==== Instruction formats ====

Instructions are divided into three types: R (register), I (immediate), and J (jump). Every instruction starts with a 6-bit opcode. In addition to the opcode, R-type instructions specify three registers,<ref name="Harris Harris 2013 pp. 294–369">{{cite book | last1=Harris | first1=David Money | last2=Harris | first2=Sarah L. | title=Digital Design and Computer Architecture | chapter=Architecture | publisher=Elsevier | year=2013 | doi=10.1016/b978-0-12-394424-5.00006-9 | pages=294–369 | isbn=9780123944245 | quote=R-type is short for register-type. R-type instructions use three registers as operands: two as sources, and one as a destination.}}</ref> a shift amount field, and a function field; I-type instructions specify two registers and a 16-bit immediate value; J-type instructions follow the opcode with a 26-bit jump target.<ref name=Price1995/>{{rp|A-174}}

The following are the three formats used for the core instruction set:

{| class="wikitable"
|-
! Type || colspan=6| -31- &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; format (bits) &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; -0-
|- align=center
| '''R''' || opcode (6) || rs (5) || rt (5) || rd (5) || shamt (5) || funct (6)
|- align=center
| '''I''' || opcode (6) || rs (5) || rt (5) ||colspan=3| immediate (16)
|- align=center
| '''J''' || opcode (6) ||colspan=5| address (26)
|}