Editing Flash memory (section)

====3D integrated circuit technology====

[[3D integrated circuit]] (3D IC) technology stacks [[integrated circuit]] (IC) chips vertically into a single 3D IC package.<ref name="James"/> Toshiba introduced 3D IC technology to NAND flash memory in April 2007, when they debuted a 16{{nbsp}}[[Gibibyte|GB]] eMMC compliant (product number THGAM0G7D8DBAI6, often abbreviated THGAM on consumer websites) embedded NAND flash memory package, which was manufactured with eight stacked 2{{nbsp}}GB NAND flash chips.<ref name="toshiba2007"/> In September 2007, [[Hynix Semiconductor]] (now [[SK Hynix]]) introduced 24-layer 3D IC technology, with a 16{{nbsp}}GB flash memory package that was manufactured with 24 stacked NAND flash chips using a wafer bonding process.<ref name="hynix2007"/> Toshiba also used an eight-layer 3D IC for their 32{{nbsp}}GB THGBM flash package and in 2008.<ref name="toshiba2008"/> In 2010, Toshiba used a 16-layer 3D IC for their 128{{nbsp}}GB THGBM2 flash package, which was manufactured with 16 stacked 8{{nbsp}}GB chips.<ref name="toshiba2010"/> In the 2010s, 3D ICs came into widespread commercial use for NAND flash memory in [[mobile devices]].<ref name="James"/>

In 2016, Micron and Intel introduced a technology known as CMOS Under the Array/CMOS Under Array (CUA), Core over Periphery (COP), Periphery Under Cell (PUA), or Xtacking,<ref>{{Cite web|url=https://www.theregister.com/2018/08/06/china_aims_to_build_dramspeed_flash/|title=NAND we'll send foreign tech packing, says China of Xtacking: DRAM-speed... but light on layer-stacking|first=Chris|last=Mellor|website=www.theregister.com}}</ref> in which the control circuitry for the flash memory is placed under or above the flash memory cell array. This has allowed for an increase in the number of planes or sections a flash memory chip has, increasing from two planes to four, without increasing the area dedicated to the control or periphery circuitry. This increases the number of IO operations per flash chip or die, but it also introduces challenges when building capacitors for charge pumps used to write to the flash memory.<ref name="auto8">{{Cite web|url=https://www.anandtech.com/show/16491/flash-memory-at-isscc-2021|title=2021 NAND Flash Updates from ISSCC: The Leaning Towers of TLC and QLC|first=Billy|last=Tallis|website=www.anandtech.com}}</ref><ref>{{Cite news|url=https://www.theregister.com/2018/11/05/sk_hynix_96_layer_flash_chip/|title=What the PUC: SK Hynix next to join big boys in 96-layer 3D NAND land|first=Chris|last=Mellor|website=www.theregister.com}}</ref><ref>{{Cite news|url=https://www.theregister.com/2016/02/22/microns_journey_into_the_depths_of_nonvolatility/|title=Look who's avoided getting chatty about XPoint again. Micron... let's get non-volatile|first=Chris|last=Mellor|website=www.theregister.com}}</ref> Some flash dies have as many as 6 planes.<ref>{{Cite web |last=Alcorn |first=Paul |date=2022-07-26 |title=Micron Takes Lead With 232-Layer NAND Flash, up to 2TB per Chip Package |url=https://www.tomshardware.com/news/micron-takes-lead-with-232-layer-nand-up-to-2tb-per-chip-package |access-date=2024-05-31 |website=Tom's Hardware |language=en}}</ref>

As of August 2017, microSD cards with a capacity up to 400 [[gigabyte|GB]] (400 billion bytes) were available.<ref name="sandisk-20170831">{{Cite press release |date=31 August 2017 |title=Western Digital Breaks Boundaries with World's Highest-Capacity microSD Card |url=https://www.sandisk.com/about/media-center/press-releases/2017/western-digital-breaks-boundaries-with-worlds-highest-capacity-microsd-card |url-status=dead |archive-url=https://web.archive.org/web/20170901035345/https://www.sandisk.com/about/media-center/press-releases/2017/western-digital-breaks-boundaries-with-worlds-highest-capacity-microsd-card |archive-date=1 September 2017 |access-date=2 September 2017 |publisher=[[SanDisk]] |place=Berlin }}</ref><ref name="forbes-20170831">{{Cite magazine |last=Bradley |first=Tony |date=31 August 2017 |title=Expand Your Mobile Storage With New 400GB microSD Card From SanDisk |url=https://www.forbes.com/sites/tonybradley/2017/08/31/expand-your-mobile-storage-with-new-400gb-microsd-card-from-sandisk |url-status=live |magazine=[[Forbes]] |archive-url=https://web.archive.org/web/20170901064146/https://www.forbes.com/sites/tonybradley/2017/08/31/expand-your-mobile-storage-with-new-400gb-microsd-card-from-sandisk/ |archive-date=1 September 2017 |access-date=2 September 2017 }}</ref> Samsung combined 3D IC chip stacking with its 3D V-NAND and TLC technologies to manufacture its 512{{nbsp}}GB KLUFG8R1EM flash memory package with eight stacked 64-layer V-NAND chips.<ref name="anandtech-20171205" /> In 2019, Samsung produced a 1024{{nbsp}}[[Gigabyte|GB]] flash package, with eight stacked 96-layer V-NAND package and with QLC technology.<ref name="electronicsweekly-samsung"/><ref name="anandtech-samsung-2018"/>

In 2025, researchers announced experimental success with a device a 400-picosecond write time.<ref>{{Cite web |last=Shaikh |first=Kaif |title=China scientists develop flash memory 10,000× faster than current tech |url=https://interestingengineering.com/innovation/china-worlds-fastest-flash-memory-device?group=test_b |access-date=2025-04-20 |website=Interesting Engineering |language=en}}</ref>