Editing Fault tree analysis (section)

===Gate symbols===
Gate symbols describe the relationship between input and output events. The symbols are derived from Boolean logic symbols:
<gallery>
File:FTA_OR_gate.jpg|OR gate
File:FTA_AND_gate.jpg|AND gate
File:FTA_XOR_gate.jpg|Exclusive OR gate
File:FTA_priority_AND_gate.jpg|Priority AND gate
File:FTA_inhibit_gate.jpg|Inhibit gate
</gallery>

The gates work as follows:
* '''OR gate'''{{snd}}the output occurs if any input occurs.
* '''AND gate'''{{snd}}the output occurs only if all inputs occur (inputs are independent from the source).
* '''Exclusive OR gate'''{{snd}}the output occurs if exactly one input occurs.
* '''Priority AND gate'''{{snd}}the output occurs if the inputs occur in a specific sequence specified by a conditioning event.
* '''Inhibit gate'''{{snd}}the output occurs if the input occurs under an enabling condition specified by a conditioning event.