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=== RAM setup === To handle the relatively large amounts of [[read-only memory|ROM]] and [[random-access memory|RAM]] (tenfold the size of 8502's {{val|64|u=KB}} address space) the C128 uses the 8722 [[memory management unit|MMU]] chip to create different memory maps, in which different combinations of RAM and ROM would appear according to bit patterns written into the MMU's configuration register at [[memory address]] {{mono|$FF00}}. Another feature of the memory management unit is to allow relocation of [[zero page]] and the [[stack (data structure)|stack]].{{citation needed|date=December 2023}} Although the C128 can theoretically support 256k of RAM in four blocks, the PCB has no provisions to add this extra RAM, nor can the MMU actually access more than 128k. Therefore, if the MMU is programmed to access blocks 2 or 3, all that results is a mirror of the RAM in blocks 0 and 1.{{citation needed|date=December 2023}} Since the I/O registers and system ROMs can be disabled or enabled freely, as well as being locatable in either RAM bank and the VIC-II set to use either bank for its memory space, up to 256 memory configurations are possible, although the vast majority of them are useless (for example, unworkable combinations like the kernal ROM in bank 0 and the I/O registers in bank 1 are possible). Because of this, BASIC's BANK statement allows the user to select 15 of the most useful arrangements, with the power-on default being Bank 15. This default places the system ROMs, I/O registers, and BASIC program text in block 0, with block 1 being used by BASIC program variables. BASIC program text and variables can extend all the way to {{mono|$FFEF}}. But since block 0 contains the ROMs and I/O registers from {{mono|$4000}} onward, BASIC uses an internal switching routine to read program text higher than {{mono|$3FFF}}.{{citation needed|date=December 2023}} The top and bottom 1k of RAM ({{mono|$0}}β{{mono|$3FF}} and {{mono|$FF00}}-{{mono|$FFFF}}) are "shared" RAM, visible from both blocks. The MMU allows either to be expanded in increments up to 16k. The {{mono|$0}}β{{mono|$3FF}} range contains the zero page and stack while {{mono|$FF00}}-{{mono|$FFFF}} contains the MMU registers and reset vectors. These areas are always shared and cannot be switched to non-shared RAM. Shared RAM is always the opposite bank from the one currently being used by the CPU, thus if bank 0 is selected, any read or write to shared RAM will refer to the corresponding locations in bank 1 and vice versa. The VIC-II can be set to use either RAM bank and from there, its normal 16k window. While on the C64, the VIC-II can only see the character ROM in banks 2 and 4 of its memory space, the C128, on the other hand, makes it possible to enable or disable the character ROM for any VIC-II bank via the register at {{mono|$1}}. Also, there are two sets of color RAMβone visible to the CPU, the other to the VIC-II and the user may select what chip sees what.{{citation needed|date=December 2023}} In CP/M mode, the Program Segment Prefix and Transient Program Area reside in Bank 1 and the I/O registers and CP/M system code in Bank 0.{{citation needed|date=December 2023}} The C128's RAM is expandable from the standard 128 KB to 256, 512 or even 1,024 KB, either by using commercial memory expansion modules, or by making one based on schematics available on the internet.<ref>[http://www.ktverkko.fi/~msmakela/8bit/memory/memory-c128.pdf Memory expansions for the Commodore 128]</ref> Commodore's RAM Expansion Units use an external 8726 [[direct memory access|DMA]] controller to transfer data between the C128's RAM and the RAM in the expansion unit.{{citation needed|date=December 2023}}
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