Editing Very long instruction word (section)

== Backward compatibility ==
{{refimprove section|date=June 2016}}

When silicon technology allowed for wider implementations (with more execution units) to be built, the compiled programs for the earlier generation would not run on the wider implementations, as the encoding of binary instructions depended on the number of execution units of the machine.

[[Transmeta]] addressed this issue by including a binary-to-binary software compiler layer (termed ''[[Binary translation|code morphing]]'') in their [[Transmeta Crusoe|Crusoe]] implementation of the [[x86]] architecture. This mechanism was advertised to basically recompile, optimize, and translate x86 opcodes at runtime into the CPU's internal machine code. Thus, the Transmeta chip is ''internally'' a VLIW processor, effectively decoupled from the x86 CISC [[instruction set]] that it executes.

Intel's [[Itanium]] architecture (among others) solved the backward-compatibility problem with a more general mechanism. Within each of the multiple-opcode instructions, a bit field is allocated to denote dependency on the prior VLIW instruction within the program instruction stream. These bits are set at [[compile time]], thus relieving the hardware from calculating this dependency information. Having this dependency information encoded in the instruction stream allows wider implementations to issue multiple non-dependent VLIW instructions in parallel per cycle, while narrower implementations would issue a smaller number of VLIW instructions per cycle.

Another perceived deficiency of VLIW designs is the [[code bloat]] that occurs when one or more execution unit(s) have no useful work to do and thus must execute ''No Operation'' [[NOP (code)|NOP]] instructions. This occurs when there are dependencies in the code and the instruction pipelines must be allowed to drain before later operations can proceed.

Since the number of transistors on a chip has grown, the perceived disadvantages of the VLIW have diminished in importance. VLIW architectures are growing in popularity, especially in the [[embedded system]] market, where it is possible to customize a processor for an application in a [[system-on-a-chip]].