Editing VAX (section)

== Processor architecture ==
[[File:Microvax 3600 (2).jpg|thumb|MicroVAX 3600 (left) with printer (right)]]

{| role="presentation" style="font-size:88%;border: 1px solid #a2a9b1;	border-spacing: 3px; background-color: #f8f9fa; color: black; margin: 0.5em 0 0.5em 1em; padding: 0.2em; float: right; clear: right;"
|-
|+ '''DEC VAX registers'''
|-
|
{| style="font-size:88%;width:39em;"
|-
| style="width:10px; text-align:left"  | <sup>3</sup><sub>1</sub>
| style="width:60px; text-align:center"| ...
| style="width:10px; text-align:right" | <sup>2</sup><sub>3</sub>
| style="width:60px; text-align:center"| ...
| style="width:10px; text-align:center"| <sup>1</sup><sub>5</sub>
| style="width:60px; text-align:center"| ...
| style="width:10px; text-align:center"| <sup>0</sup><sub>7</sub>
| style="width:60px; text-align:center"| ...
| style="width:10px; text-align:center"| <sup>0</sup><sub>0</sub>
| style="width:100px; background:white; color:black" | ''(bit position)''
|-
! colspan="10" style="text-align:left;" | General registers
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R0
| style="background:white; color:black" colspan="3"| Register 0
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R1
| style="background:white; color:black"| Register 1
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R2
| style="background:white; color:black"| Register 2
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R3
| style="background:white; color:black"| Register 3
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R4
| style="background:white; color:black"| Register 4
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R5
| style="background:white; color:black"| Register 5
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R6
| style="background:white; color:black"| Register 6
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R7
| style="background:white; color:black"| Register 7
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R8
| style="background:white; color:black"| Register 8
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R9
| style="background:white; color:black"| Register 9
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R10
| style="background:white; color:black"| Register 10
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R11
| style="background:white; color:black"| Register 11
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R12 / AP
| style="background:white; color:black"| Register 12  / Argument Pointer
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R13 / FP
| style="background:white; color:black"| Register 13 / Frame Pointer
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R14 / SP
| style="background:white; color:black"| Register 14 / Stack Pointer
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| R15 / PC
| style="background:white; color:black"| Register 15 / Program Counter
|-
! colspan="10" style="text-align:left;" | Processor Status Longword
|- style="background:silver;color:black"
| style="text-align:center" colspan="9"| (See adjacent table for bit definitions)
| style="background:white; color:black"| PSL
|}
|}

=== Virtual memory map ===
The VAX virtual memory is divided into four sections. Each is one gigabyte (in the context of addressing, 2<sup>30</sup> bytes) in size:

{|class="wikitable"
!Section
! Address range
|-
|P0
| <code>0x00000000</code> – <code>0x3fffffff</code>
|-
|P1
| <code>0x40000000</code> – <code>0x7fffffff</code>
|-
|S0
| <code>0x80000000</code> – <code>0xbfffffff</code>
|-
|S1
| <code>0xc0000000</code> – <code>0xffffffff</code>
|}
For VMS, P0 was used for user process space, P1 for process stack, S0 for the operating system, and S1 was reserved.

=== Privilege modes ===
The VAX has four hardware implemented privilege modes:

{|class="wikitable"
! No.
! Mode
! VMS use
! Notes
|-
| 0
| Kernel
| OS kernel
| Highest [[privilege level]]
|-
| 1
| Executive
| [[File system]]
| 
|-
| 2
| Supervisor
| Shell (DCL)
| 
|-
| 3
| User
| Normal programs
| Lowest privilege level
|-
|}

=== Processor status longword ===
The process status longword contains 32 bits:

{|class="wikitable"
! width=3% | CM
! width=3% | TP
! width=6% | MBZ
! width=3% | FD
! width=3% | IS
! width=6% | cmod
! width=6% | pmod
! width=3% | MBZ
! width="15%" |IPL
! width="24%" |MBZ
! width=3% | DV
! width=3% | FU
! width=3% | IV
! width=3% | T
! width=3% | N
! width=3% | Z
! width=3% | V
! width=3% | C
|- style="text-align:center"
|31
|30
|29:28
|27
|26
|25:24
|23:22
|21
|20:16
|15:8
|7
|6
|5
|4
|3
|2
|1
|0
|}

{|class="wikitable"
! Bits || Meaning || Bits || Meaning
|-
| align="center"|  31 || PDP-11 compatibility mode                     || align="center"| 15:8|| MBZ (must be zero)
|-
| align="center"|  30 || trace pending                                 || align="center"|  7  || decimal overflow trap enable
|-
| align="center"|29:28|| MBZ (must be zero)                            || align="center"|  6  || floating-point underflow trap enable
|-
| align="center"|  27 || first part done (interrupted instruction)     || align="center"|  5  || [[integer overflow]] trap enable
|-
| align="center"|  26 || interrupt stack                               || align="center"|  4  || trace
|-
| align="center"|25:24|| current privilege mode                        || align="center"|  3  || negative
|-
| align="center"|23:22|| previous privilege mode                       || align="center"|  2  || zero
|-
| align="center"|  21 || MBZ (must be zero)                            || align="center"|  1  || overflow
|-
| align="center"|20:16|| IPL (interrupt priority level)                || align="center"|  0  || carry
|}