Editing Pentium II (section)

====Pentium II OverDrive====
In 1998, the 0.25 μm Deschutes core was utilized in the creation of the [[Intel Pentium II Overdrive#Socket 8|Pentium II Overdrive]] processor, which was aimed at allowing corporate [[Pentium Pro]] users to upgrade their aging servers. Combining the Deschutes core in a [[flip-chip]] package with a 512&nbsp;KB full-speed L2 cache chip from the Pentium II Xeon into a [[Socket 8]]-compatible module resulted in a 300 or 333&nbsp;MHz processor that could run on a 60 or 66&nbsp;MHz front-side bus. This combination brought together some of the more attractive aspects of the Pentium II and the Pentium II Xeon: [[MMX (instruction set)|MMX]] support/improved 16-bit performance and full-speed L2 cache, respectively.<ref>[https://web.archive.org/web/*/http://www.heise.de/ct/english/98/18/020/ Wayback machine archive of Heise, accessed June 17, 2009]</ref> The later "Dixon" mobile Pentium II would emulate this combination with 256&nbsp;KB of full-speed cache.

In Intel's "Family/Model/Stepping" scheme, the Pentium II OverDrive CPU identifies itself as family 6, model 3, though this is misleading, as it is not based on the family 6/model 3 Klamath core. As mentioned in the Pentium II Processor update documentation from Intel, "although this processor has a CPUID of 163xh, it uses a Pentium II processor CPUID 065xh processor core."<ref>{{Cite web|date=July 2002 |url=http://download.intel.com/design/PentiumII/specupdt/24333749.pdf|title=Intel Pentium II Processor Specification Update|archive-url=https://web.archive.org/web/20110831012432/http://download.intel.com/design/PentiumII/specupdt/24333749.pdf|url-status=dead|archive-date=August 31, 2011}}</ref>