Editing PDP-11 (section)

=== Instruction set orthogonality ===
{{See also|PDP-11 architecture}}

The PDP–11 processor architecture has a mostly [[orthogonal instruction set]]. For example, instead of instructions such as ''load'' and ''store'', the PDP–11 has a ''move'' instruction for which either operand (source and destination) can be memory or register. There are no specific ''input'' or ''output'' instructions; the PDP–11 uses [[memory-mapped I/O]] and so the same ''move'' instruction is used; orthogonality even enables moving data directly from an input device to an output device. More complex instructions such as ''add'' likewise can have memory, register, input, or output as source or destination.

Most operands can apply any of eight addressing modes to eight registers. The addressing modes provide register, immediate, absolute, relative, deferred (indirect), and indexed addressing, and can specify autoincrementation and autodecrementation of a register by one (byte instructions) or two (word instructions). Use of relative addressing lets a machine-language program be [[position-independent code|position-independent]].