Editing MMIX (section)

====Special registers====
The 32 special physical architectural registers are as follows:
# <li value="0">'''rB, the bootstrap register (trip)'''</li>
#: When tripping, rB ← $255 and $255 ← rJ. Thus saving rJ in a general register.
# '''rD, the dividend register'''
#: Unsigned integer divide uses this as the left half of the 128-bit input that is to be divided by the other operand.
# '''rE, the epsilon register'''
#: Used for floating comparisons with respect to epsilon.
# '''rH, the himult register'''
#: Used to store the left half of the 128-bit result of unsigned integer multiplication.
# '''rJ, the return-jump register'''
#: Used to save the address of the next instruction by PUSHes and by POP to return from a PUSH.
# '''rM, the multiplex mask register'''
#: Used by the multiplex instruction.
# '''rR, the remainder register'''
#:Is set to the remainder of integer division.
# '''rBB, the bootstrap register (trap)'''
#: When trapping, rBB ← $255 and $255 ← rJ. Thus saving rJ in a general register
# '''rC, the cycle counter'''
#: Incremented every cycle.
# '''rN, the serial number'''
#: A constant identifying this particular MMIX processor.
# '''rO, the register stack offset'''
#: Used to implement the register stack.
# '''rS, the register stack pointer'''
#: Used to implement the register stack.
# '''rI, the interval counter'''
#: Decremented every cycle. Causes an interrupt when zero.
# '''rT, the trap address register'''
#: Used to store the address of the trip vector.
# '''rTT, the dynamic trap address register'''
#: Used to store the address of the trap vector.
# '''rK, the interrupt mask register'''
#: Used to enable and disable specific interrupts.
# '''rQ, the interrupt request register'''
#: Used to record interrupts as they occur.
# '''rU, the usage counter'''
#: Used to keep a count of executed instructions.
# '''rV, the virtual translation register'''
#: Used to translate virtual addresses to physical addresses. Contains the size and number of segments, the root location of the page table and the address space number.
# '''rG, the global threshold register'''
#: All general registers references with a number greater or equal to rG refer to global registers.
# '''rL, the local threshold register'''
#: All general registers references with a number smaller than rL refer to local registers.
# '''rA, the arithmetic status register'''
#: Used to record, enable and disable arithmetic exception like overflow and divide by zero.
# '''rF, the failure location register'''
#: Used to store the address of the instruction that caused a failure.
# '''rP, the prediction register'''
#: Used by conditional swap (CSWAP).
# '''rW, the where-interrupted register (trip)'''
#: Used, when tripping, to store the address of the instruction after the one that was interrupted.
# '''rX, the execution register (trip)'''
#: Used, when tripping, to store the instruction that was interrupted.
# '''rY, the Y operand (trip)'''
#: Used, when tripping, to store the Y operand of the interrupted instruction.
# '''rZ, the Z operand (trip)'''
#: Used, when tripping, to store the Z operand of the interrupted instruction.
# '''rWW, the where-interrupted register (trap)'''
#: Used, when trapping, to store the address of the instruction after the one that was interrupted.
# '''rXX, the execution register (trap)'''
#: Used, when trapping, to store the instruction that was interrupted.
# '''rYY, the Y operand (trap)'''
#: Used, when trapping, to store the Y operand of the interrupted instruction.
# '''rZZ, the Z operand (trap)'''
#: Used, when trapping, to store the Z operand of the interrupted instruction.

Like programs running on almost all other CPUs,
MMIX programs can be [[interrupt]]ed in several ways.
External hardware, such as timers, are a common source of [[preemption (computing)|preemption interrupts]].
Many instructions cause an interrupt in certain exceptional cases; such as the [[memory protection]] [[page fault]] exceptions used to implement virtual memory, and floating point [[exception handling]].
MMIX has 2 kinds of interrupts: "trips" and "traps".
The main difference between "trips" and "traps" is that
traps send control to a "trap handler" program in the operating system (trapping), but
trips send control to a "trip handler" program in the user application (tripping).
Users can also force any interrupt handler to run with explicit [[software interrupt]] instructions TRIP and TRAP, similar to some kinds of [[trap (computing)|trap]] in other computer systems.
In particular, a [[system call]] from a user program to the operating system uses a TRAP instruction.<ref name="MMIXware" />{{rp|38}}