Editing MIPS architecture (section)

==== Registers ====

MIPS I has thirty-two 32-bit general-purpose registers (GPR). Register {{mono|$0}} is hardwired to zero and writes to it are discarded. Register {{mono|$31}} is the [[link register]]. For integer multiplication and division instructions, which run asynchronously from other instructions, a pair of 32-bit registers, ''HI'' and ''LO'', are provided. There is a small set of instructions for copying data between the general-purpose registers and the HI/LO registers.

The program counter has 32 bits. The two low-order bits always contain zero since MIPS I instructions are 32 bits long and are aligned to their natural word boundaries.