Editing I²C (section)

===Messaging example: 24C32 EEPROM===
[[File:Medion MD8910 - STMicroelectronics 24C08-8003.jpg|thumb|[[STMicroelectronics]] M24C08-BN6: serial [[EEPROM]] with I<sup>2</sup>C bus<ref>{{cite web |title=8-Kbit serial I<sup>2</sup>C bus EEPROM (PDF) |url=https://www.st.com/resource/en/datasheet/m24c08-f.pdf |website=STMicroelectronics |access-date=19 November 2019 |archive-url=https://web.archive.org/web/20191018114246/https://www.st.com/resource/en/datasheet/m24c08-f.pdf |url-status=live |archive-date=2019-10-18 |date=October 2017}}</ref>]]
One specific example is the 24C32 type [[EEPROM]], which uses two request bytes that are called Address High and Address Low. (Accordingly, these EEPROMs are not usable by pure SMBus hosts, which support only single-byte commands or addresses.) These bytes are used for addressing bytes within the 32&nbsp;[[kilobit|kbit]] (or 4&nbsp;[[kilobyte|kB]]) EEPROM address space. The same two-byte addressing is also used by larger EEPROMs, like the 24C512 which stores 512&nbsp;kbits (or 64&nbsp;kB). Writing data to and reading from these EEPROMs uses a simple protocol: the address is written, and then data is transferred until the end of the message. The data transfer part of the protocol can cause trouble on the SMBus, since the data bytes are not preceded by a count, and more than 32 bytes can be transferred at once. I<sup>2</sup>C EEPROMs smaller than 32&nbsp;kbit, like the 2&nbsp;kbit 24C02, are often used on the SMBus with inefficient single-byte data transfers to overcome this problem.

A single message writes to the EEPROM. After the START, the controller sends the chip's bus address with the direction bit clear (''write''), then sends the two-byte address of data within the EEPROM and then sends data bytes to be written starting at that address, followed by a STOP. When writing multiple bytes, all the bytes must be in the same 32-byte page. While it is busy saving those bytes to memory, the EEPROM will not respond to further I<sup>2</sup>C requests. (That is another incompatibility with SMBus: SMBus devices must always respond to their bus addresses.)

To read starting at a particular address in the EEPROM, a combined message is used. After a START, the controller first writes that chip's bus address with the direction bit clear (''write'') and then the two bytes of EEPROM data address. It then sends a (repeated) START and the EEPROM's bus address with the direction bit set (''read''). The EEPROM will then respond with the data bytes beginning at the specified EEPROM data address — a combined message: first a write, then a read. The controller issues an ACK after each read byte except the last byte, and then issues a STOP. The EEPROM increments the address after each data byte transferred; multi-byte reads can retrieve the entire contents of the EEPROM using one combined message.