Editing Transaction Processing Facility (section)

===Tightly coupled===
Although IBM's [[IBM 3083|3083]] was aimed at running TPF on a "fast... [[Uniprocessor system|uniprocessor]]",<ref name=GAR.99>{{cite newsgroup
|url=https://groups.google.com/forum/#!original/alt.folklore.computers/cUYpRP6bj8g/0EklpD_PiNIJ
|newsgroup=alt.folklore.computers
|title=IBM 9020 computers used by FAA (was Re: EPO stories (was: HELP IT'S HOT!!!!!))
|author=Anne & Lynn Wheeler}}</ref> TPF is capable of running on a [[Multiprocessing|multiprocessor]], that is, on systems in which there is more than one CPU.  Within the [[LPAR]], the CPUs are referred to as ''instruction streams'' or simply '''I-streams'''.  When running on a LPAR with more than one I-stream, TPF is said to be running '''tightly coupled'''. TPF adheres to [[Symmetric multiprocessing|SMP]] concepts; no concept of [[Non-uniform memory access|NUMA]]-based distinctions between memory addresses exist.

The depth of the ''CPU ready list'' is measured as any incoming transaction is received, and queued for the I-stream with the lowest demand, thus maintaining continuous load balancing among available processors. In cases where '''loosely coupled''' configurations are populated by multiprocessor '''CPC'''s (''Central Processing Complex'', i.e. the physical machine packaged in one ''system cabinet''), [[Symmetric multiprocessing|SMP]] takes place within the CPC as described here, whereas sharing of inter-CPC resources takes place as described under '''Loosely coupled''', below.

In the TPF architecture, all memory (except for a 4KB-sized ''prefix area'') is shared among all I-streams.  In instances where memory-resident data must or should be kept separated by I-stream, the programmer typically allocates a storage area into a number of ''subsections'' equal to the number of I-streams, then accesses the desired I-stream associated area by taking the base address of the allocated area, and adding to it the product of the I-stream relative number times the size of each subsection.