Editing Motorola 68000 (section)

===MACSS===
Crook formed the Motorola Advanced Computer System on Silicon (MACSS) project to build the design and hired Tom Gunter to be its principal architect. Gunter began forming his team in January 1977.{{sfn|Oral|2007|p=6}} The performance goal was set at 1 [[million instructions per second]] (MIPS). They wanted the design to not only win back microcomputer vendors like [[Apple Computer]] and [[Tandy Corporation|Tandy]], but also minicomputer companies like [[National Cash Register|NCR]] and [[AT&T]].{{sfn|Oral|2007|p=6}}

The team decided to abandon an attempt at [[backward compatibility]] with the 6800, as they felt the 8-bit designs were too limited to be the basis for new designs. The new system was influenced by the [[PDP-11]], the most popular minicomputer design of the era.{{sfn|Oral|2007|p=8}} At the time, a key concept in minis was the concept of an [[orthogonal instruction set]], in which every operation was allowed to work on any sort of data. To feed the correct data into the internal units, MACSS made extensive use of [[microcode]], essentially small programs in [[read only memory]] that gathered up the required data, performed the operations and wrote out the results. MACSS was among the first to use this technique in a microprocessor.{{sfn|Oral|2007|p=7}}<ref name="Andersson 2">{{cite web|url=https://www.eetimes.com/the-microprocessor-revolution/2|title=The Microprocessor (R)evolution|last=Andersson|first=Sven|work=[[EE Times]]|date=2014-03-24|access-date=2022-07-29|page=2|archive-url=https://web.archive.org/web/20220729222733/https://www.eetimes.com/the-microprocessor-revolution/2|archive-date=2022-07-29|url-status=live}}</ref>

There was a large amount of support hardware for the 6800 that would remain useful, things like [[UART]]s and similar interfacing systems. For this reason, the new design retained a [[Protocol (computing)|bus protocol]] compatibility mode for existing 6800 peripheral devices.<ref>{{cite book|url=https://books.google.com/books?id=eeRdBgAAQBAJ&pg=PA264|title=Servicing Personal Computers|edition=Third|last=Tooley|first=Michael|publisher=[[Newnes (publisher)|Newnes]]|date=1992|access-date=2022-07-29|pages=264–265|isbn=0-7506-0374-7|archive-date=July 29, 2022|archive-url=https://web.archive.org/web/20220729234027/https://books.google.com/books?id=eeRdBgAAQBAJ&pg=PA264|url-status=live}}</ref><ref name="Andersson 2"/>

A chip with 32 data and 32 addressing pins would require 64 pins, plus more for power and other features. At the time, 64-pin [[dual inline package]] (DIP)s were "large, heavy-cost" systems and "just terrible", making that the largest they could consider. To make it fit, Crook selected a hybrid design, with a 32-bit [[instruction set architecture]] (ISA) but 16-bit components implementing it, like the [[arithmetic logic unit]] (ALU).{{sfn|Oral|2007|p=6}} The external interface was reduced to 16 data pins and 24 for addresses, allowing it all to fit in a 64-pin package. This became known as the "Texas Cockroach".{{sfn|Oral|2007|p=9}}{{efn|Hybrid designs of this sort were already common in the minicomputer field. The Data General Nova was a 16-bit design implemented using 4-bit ALUs.}}

By the mid-1970s, Motorola's MOS design techniques had become less advanced than their competition, and their fabrication lines at times struggled with low [[Semiconductor device fabrication#Device yield|yields]]. By the late-1970s, the company had entered a technology exchange program with [[Hitachi]], dramatically improving their production capabilities. As part of this, a new fab named MOS-8 was built using the latest 5-inch [[semiconductor wafer|wafer]] sizes and Intel's [[HMOS]] process with a 3.5&nbsp;[[μm]] feature size.{{sfn|Oral|2007|p=10}} This was an investment aimed at catching the competition: even upstart semiconductor companies such as Zilog and [[MOS Technology]] had introduced CPUs fabricated on [[Depletion and enhancement modes|depletion-mode]] [[NMOS logic]] before Motorola did. In fact, Motorola may have substantially lagged contemporaries in phasing out enhancement mode and metal gate, with Gunter recollecting that the 68000 itself had to succeed despite initially adopting a metal-gate design.{{sfn|Oral|2007|pp=9-11}} Though the point about playing catch-up is clear, this could not have been an entirely accurate summary because Motorola's 1976 datasheets, predating the inception of the MACCS project, denote the majority of its 6800 family in silicon-gate.<ref>{{cite web|url=http://www.bitsavers.org/components/motorola/6800/MC6800_Microcomputer_System_Design_Data_1976.pdf|title=M6800 Microcomputer System Design Data|work=[[Motorola]]|date=1976|access-date=2023-04-17|page=21|archive-url=https://web.archive.org/web/20230418042432/http://www.bitsavers.org/components/motorola/6800/MC6800_Microcomputer_System_Design_Data_1976.pdf|archive-date=2023-04-18|url-status=live}}</ref> Indeed, Gunter's own 1979 article introducing the 68000 highlighted it as a silicon-gate depletion-mode HMOS design.<ref>{{cite journal|url=https://ieeexplore.ieee.org/document/1658617|title=Microsystems a Microprocessor Architecture for a Changing World: The Motorola 68000|journal=Computer|date=1979|access-date=2023-04-17|author=Stritter and Gunter|volume=12|issue=2|pages=43–52 |doi=10.1109/MC.1979.1658617 |s2cid=15893310 }}</ref>  Whatever the degree of Motorola's process and manufacturing deficits in the early days, the team was undeterred and would not compromise in its pursuit of a microprocessor with industry-leading performance.{{sfn|Oral|2007|p=11}}