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MIX (abstract machine)
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=== Instructions === Each machine instruction in memory occupies one word, and consists of 4 parts: the address (2 bytes and the sign of the word) in memory to read or write; an index specification (1 byte, describing which rI index register to use) to add to the address; a modification (1 byte) that specifies which parts of the register or memory location will be read or altered; and the operation code (1 byte). All operation codes have an associated mnemonic. {|style="text-align:center;margin-left:0.5in" |style="width:15px;"|<sup>3</sup><sub>0</sub> |style="width:15px;"|<sup>2</sup><sub>9</sub> |style="width:15px;"|<sup>2</sup><sub>8</sub> |style="width:15px;"|<sup>2</sup><sub>7</sub> |style="width:15px;"|<sup>2</sup><sub>6</sub> |style="width:15px;"|<sup>2</sup><sub>5</sub> |style="width:15px;"|<sup>2</sup><sub>4</sub> |style="width:15px;"|<sup>2</sup><sub>3</sub> |style="width:15px;"|<sup>2</sup><sub>2</sub> |style="width:15px;"|<sup>2</sup><sub>1</sub> |style="width:15px;"|<sup>2</sup><sub>0</sub> |style="width:15px;"|<sup>1</sup><sub>9</sub> |style="width:15px;"|<sup>1</sup><sub>8</sub> |style="width:15px;"|<sup>1</sup><sub>7</sub> |style="width:15px;"|<sup>1</sup><sub>6</sub> |style="width:15px;"|<sup>1</sup><sub>5</sub> |style="width:15px;"|<sup>1</sup><sub>4</sub> |style="width:15px;"|<sup>1</sup><sub>3</sub> |style="width:15px;"|<sup>1</sup><sub>2</sub> |style="width:15px;"|<sup>1</sup><sub>1</sub> |style="width:15px;"|<sup>1</sup><sub>0</sub> |style="width:15px;"|<sup>0</sup><sub>9</sub> |style="width:15px;"|<sup>0</sup><sub>8</sub> |style="width:15px;"|<sup>0</sup><sub>7</sub> |style="width:15px;"|<sup>0</sup><sub>6</sub> |style="width:15px;"|<sup>0</sup><sub>5</sub> |style="width:15px;"|<sup>0</sup><sub>4</sub> |style="width:15px;"|<sup>0</sup><sub>3</sub> |style="width:15px;"|<sup>0</sup><sub>2</sub> |style="width:15px;"|<sup>0</sup><sub>1</sub> |style="width:15px;"|<sup>0</sup><sub>0</sub> |- |colspan="1" style="background-color:#CCC"| Β± |colspan="12" style="background-color:#CCC"| Address |colspan="6" style="background-color:#CCF"| Index |colspan="6" style="background-color:#CEC"| Modification |colspan="6" style="background-color:#FCC"| Operation |} MIX programs frequently use self-modifying code, in particular to return from a subroutine, as MIX lacks an automatic subroutine return stack. [[Self-modifying code]] is facilitated by the modification byte, allowing the program to store data to, for example, the address part of the target instruction, leaving the rest of the instruction unmodified. MIX programs are typically constructed using the MIXAL assembly language; for an example, see the [[Wikibooks:List of hello world programs#General-purpose fictional computer: MIX.2C MIXAL|list hello world programs]] page. {| class="wikitable" |- ! {{rh|align=right}} | {{code|2=asm|LDA ADDR,i(0:5)}} | {{code|2=pascal|1=rA := memory[ADDR + rIi];}} |- ! {{rh|align=right}} | {{code|2=asm|LDX ADDR,i(0:5)}} | {{code|2=pascal|1=rX := memory[ADDR + rIi];}} |- ! {{rh|align=right}} | {{code|LD? ADDR,i(0:5)}} | {{code|1=rI? := memory[ADDR + rIi];}} |- ! {{rh|align=right}} | {{code|2=asm|LDAN ADDR,i(0:5)}} | {{code|2=pascal|1=rA := - memory[ADDR + rIi];}} |- ! {{rh|align=right}} | {{code|2=asm|LDXN ADDR,i(0:5)}} | {{code|2=pascal|1=rX := - memory[ADDR + rIi];}} |- ! {{rh|align=right}} | {{code|LD?N ADDR,i(0:5)}} | {{code|1=rI? := - memory[ADDR + rIi];}} |- ! {{rh|align=right}} | {{code|2=asm|STA ADDR,i(0:5)}} | {{code|2=pascal|1=memory[ADDR + rIi] := rA;}} |- ! {{rh|align=right}} | {{code|2=asm|STX ADDR,i(0:5)}} | {{code|2=pascal|1=memory[ADDR + rIi] := rX;}} |- ! {{rh|align=right}} | {{code|ST? ADDR,i(0:5)}} | {{code|1=memory[ADDR + rIi] := rI?;}} |- ! {{rh|align=right}} | {{code|2=asm|STJ ADDR,i(0:5)}} | {{code|2=pascal|1=memory[ADDR + rIi] := rJ;}} |- ! {{rh|align=right}} | {{code|2=asm|STZ ADDR,i(0:5)}} | {{code|2=pascal|1=memory[ADDR + rIi] := 0;}} |- ! {{rh|align=right}} | {{code|2=asm|ADD ADDR,i(0:5)}} | {{code|2=pascal|1=rA := rA + memory[ADDR + rIi];}} |- ! {{rh|align=right}} | {{code|2=asm|SUB ADDR,i(0:5)}} | {{code|2=pascal|1=rA := rA - memory[ADDR + rIi];}} |- ! {{rh|align=right}} | {{code|2=asm|MUL ADDR,i(0:5)}} | {{code|2=pascal|1=(rA,rX) := rA * memory[ADDR + rIi];}} |- ! {{rh|align=right}} | {{code|2=asm|DIV ADDR,i(0:5)}} | {{sxhl|2=c|1=rA := int( (rA,rX) / memory[ADDR + rIi] ); rX := (rA,rX) % memory[ADDR + rIi];}} |- ! {{rh|align=right}} | {{code|2=asm|ENTA ADDR,i}} | {{code|2=pascal|1=rA := ADDR + rIi;}} |- ! {{rh|align=right}} | {{code|2=asm|ENTX ADDR,i}} | {{code|2=pascal|1=rX := ADDR + rIi;}} |- ! {{rh|align=right}} | {{code|ENT? ADDR,i}} | {{code|1=rI? := ADDR + rIi;}} |- ! {{rh|align=right}} | {{code|2=asm|ENNA ADDR,i}} | {{code|2=pascal|1=rA := - ADDR - rIi;}} |- ! {{rh|align=right}} | {{code|2=asm|ENNX ADDR,i}} | {{code|2=pascal|1=rX := - ADDR - rIi;}} |- ! {{rh|align=right}} | {{code|ENN? ADDR,i}} | {{code|1=rI? := - ADDR - rIi;}} |- ! {{rh|align=right}} | {{code|2=asm|INCA ADDR,i}} | {{code|2=pascal|1=rA := rA + ADDR + rIi;}} |- ! {{rh|align=right}} | {{code|2=asm|INCX ADDR,i}} | {{code|2=pascal|1=rX := rX + ADDR + rIi;}} |- ! {{rh|align=right}} | {{code|INC? ADDR,i}} | {{code|1=rI? := rI? + ADDR + rIi;}} |- ! {{rh|align=right}} | {{code|2=asm|DECA ADDR,i}} | {{code|2=pascal|1=rA := rA - ADDR - rIi;}} |- ! {{rh|align=right}} | {{code|2=asm|DECX ADDR,i}} | {{code|2=pascal|1=rX := rX - ADDR - rIi;}} |- ! {{rh|align=right}} | {{code|DEC? ADDR,i}} | {{code|1=rI? := rI? - ADDR - rIi;}} |- ! {{rh|align=right}} | {{code|2=asm|CMPA ADDR,i(0:5)}} | compare {{code|rA}} with {{code|memory[ADDR + rIi] and set comparison flag;}} |- ! {{rh|align=right}} | {{code|2=asm|CMPX ADDR,i(0:5)}} | compare {{code|rX}} with {{code|memory[ADDR + rIi] and set comparison flag;}} |- ! {{rh|align=right}} | {{code|CMP? ADDR,i(0:5)}} | compare {{code|rI?}} with {{code|memory[ADDR + rIi] and set comparison flag;}} |- ! {{rh|align=right}} | {{code|2=asm|JMP ADDR,i}} | {{sxhl|2=pascal|1=rJ := address of next instruction; goto ADDR + rIi;}} |- ! {{rh|align=right}} | {{code|2=asm|JSJ ADDR,i}} | {{code|2=pascal|1=goto ADDR + rIi;}} |- ! {{rh|align=right}} | {{code|2=asm|JOV ADDR,i}} | {{sxhl|2=pascal|1= if (overflow) then overflow := false; goto ADDR + rIi;}} |- ! {{rh|align=right}} | {{code|2=asm|JNOV ADDR,i}} | {{sxhl|2=pascal|1= if (no overflow) then goto ADDR + rIi; else overflow := false;}} |- ! {{rh|align=right}} | {{code|JL, JE, JG ADDR,i}}<br>{{code|JGE, JNE, JLE ADDR,i}} | {{sxhl|2=pascal|1=if (less, equal, greater) then goto ADDR + rIi; if (no less, unequal, no greater) then goto ADDR + rIi;}} |- ! {{rh|align=right}} | {{code|JAN/JAZ/JAP ADDR,i}}<br>{{code|JANN/JANZ/JANP ADDR,i}} | {{sxhl|2=pascal|1=if (rA<0 or rA==0 or rA>0) then goto ADDR + rIi; if (rA>=0 or rA!=0 or rA<=0) then goto ADDR + rIi;}} |- ! {{rh|align=right}} | {{code|JXN/JXZ/JXP ADDR,i}}<br>{{code|JXNN/JXNZ/JXNP ADDR,i}} | {{sxhl|2=text|1=if (rX<0 or rX==0 or rX>0) then goto ADDR + rIi; if (rX>=0 or rX!=0 or rX<=0) then goto ADDR + rIi;}} |- ! {{rh|align=right}} | {{code|J?N/J?Z/J?P ADDR,i}}<br>{{code|J?NN/J?NZ/J?NP ADDR,i}} | {{pre|1=if (rI?<0 or rI?==0 or rI?>0) then goto ADDR + rIi; if (rI?>=0 or rI?!=0 or rI?<=0) then goto ADDR + rIi;}} |- ! {{rh|align=right}} | {{code|2=asm|MOVE ADDR,i(F)}} | {{sxhl|2=c|1= for (n = 0; n < F; n++, rI1++) memory[rI1] := memory[ADDR+rIi+n];}} |- ! {{rh|align=right}} | {{code|SLA/SRA ADDR,i}}<br>{{code|SLAX/SRAX ADDR,i}}<br>{{code|SLC/SRC ADDR,i}} | shift {{code|rA}} to the left/right by {{code|ADDR+rIi}} bytes<br>shift {{code|(rA,rX)}} to the left/right by {{code|ADDR+rIi}} bytes<br>rotate {{code|(rA,rX)}} to the left/right by {{code|ADDR+rIi}} bytes |- ! {{rh|align=right}} | {{code|NOP}} | do nothing; |- ! {{rh|align=right}} | {{code|HLT}} | halt execution; |- ! {{rh|align=right}} | {{code|2=asm|IN ADDR,i(F)}} | read in one block from input unit {{code|F}}<br>into {{code|memory[ADDR + rIi]}} onwards; |- ! {{rh|align=right}} | {{code|2=asm|OUT ADDR,i(F)}} | output one block to unit {{code|F}}<br>from {{code|memory[ADDR + rIi]}} onwards; |- ! {{rh|align=right}} | {{code|2=asm|IOC ADDR,i(F)}} | send control instruction to i/o unit {{code|F}}; |- ! {{rh|align=right}} | {{code|2=asm|JRED ADDR,i(F)}} | {{code|2=pascal|1=if (i/o unit F is ready) then goto ADDR + rIi;}} |- ! {{rh|align=right}} | {{code|2=asm|JBUS ADDR,i(F)}} | {{code|2=pascal|1=if (i/o unit F is busy) then goto ADDR + rIi;}} |- ! {{rh|align=right}} | {{code|NUM}} | {{code|1=rA := numerical value of characters in (rA,rX);}} |- ! {{rh|align=right}} | {{code|CHAR}} | {{code|1=(rA,rX) := character codes representing value of rA;}} |}
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