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==Models== Intel offered several suffixes and variants (see table). Variants include: * ''[[RapidCAD|Intel RapidCAD]]'': a specially packaged Intel 486DX and a dummy [[floating-point unit]] (FPU) designed as pin-compatible replacements for an [[i386]] processor and [[Intel 80387|80387]] FPU. * ''i486SL-NM'': i486SL based on i486SX. * ''[[Intel 80487SX|i487SX (P23N)]]'': i486DX with one extra pin sold as an FPU upgrade to [[i486SX]] systems; When the i487SX was installed, it ensured that an i486SX was present on the [[motherboard]] but disabled it, taking over all of its functions. * ''[[Intel 80486 OverDrive|i486 OverDrive (P23T/P24T)]]'': i486SX, i486SX2, i486DX2 or i486DX4. Marked as upgrade processors, some models had different pinouts or voltage-handling abilities from "standard" chips of the same speed. Fitted to a coprocessor or "OverDrive" socket on the motherboard, they worked the same as the i487SX. The maximal internal clock frequency (on Intel's versions) ranged from 16 to 100 MHz. The 16 MHz i486SX model was used by [[Dell Computers]]. One of the few i486 models specified for a 50 MHz bus (486DX-50) initially had overheating problems and was moved to the 0.8-[[Micrometre|micrometer]] fabrication process. However, problems continued when the 486DX-50 was installed in local-bus systems due to the high bus speed, making it unpopular with mainstream consumers. Local-bus video was considered a requirement at the time, though it remained popular with users of [[Extended Industry Standard Architecture|EISA]] systems. The 486DX-50 was soon eclipsed by the clock-doubled [[Intel 80486DX2|i486DX2]], which although running the internal CPU logic at twice the external bus speed (50 MHz), was nevertheless slower because the external bus ran at only 25 MHz. The i486DX2 at 66 MHz (with 33 MHz external bus) was faster than the 486DX-50, overall. More powerful i486 iterations such as the OverDrive and [[DX4]] were less popular (the latter available as an OEM part only), as they came out after Intel had released the [[Pentium (original)|next-generation Pentium]] processor family. Certain steppings of the DX4 also officially supported 50 MHz bus operation, but it was a seldom-used feature. :{| class="wikitable" ! || Model || CPU/bus<br />clock speed || [[VCore|Voltage]] || [[L1 cache]]{{efn|1=''WT'' = write-through cache strategy, ''WB'' = write-back cache strategy.}} || Introduced ! width="520px" | Notes |- | [[File:Intel i486 DX 25MHz SX328.jpg|80px]][[File:Intel i486 DX-33.jpg|80px]][[File:Intel i486 dx 50mhz 2007 03 27.jpg|80px]] || i486DX (P4) || 20, 25 MHz<br />33 MHz<br />50 MHz || 5 V || 8 KB WT || April 1989<br />May 1990<br />June 1991 || The original chip without clock multiplier |- | {{Anchor|486SL}}[[File:KL Intel 486SL.jpg|80px]] || i486SL || 20, 25, 33 MHz || 5 V or 3.3 V || 8 KB WT || November 1992 || Low-power version of the i486DX, reduced VCore, SMM ([[System Management Mode]]), stop clock, and power-saving features β mainly for use in portable computers |- | [[File:Intel i486 sx 33mhz 2007 03 27.jpg|80px]] || i486SX (P23) || 16, 20, 25 MHz<br />33 MHz || 5 V || 8 KB WT || September 1991<br />September 1992 || An i486DX with the FPU part disabled; later versions had the FPU removed from the [[Integrated circuit|die]] to reduce area and hence cost. |- | [[File:Intel i486 dx2 66mhz 2007 03 27.jpg|80px]] || i486DX2 (P24) || 40/20, 50/25 MHz<br />66/33 MHz || 5 V || 8 KB WT || March 1992<br />August 1992 || The internal processor clock runs at twice the [[clock rate]] of the external bus clock |- | || i486DX-S (P4S) || 33 MHz; 50 MHz || 5 V or 3.3 V || 8 KB WT || June 1993 || SL Enhanced 486DX |- | [[File:KL Intel i486DX2 PQFP.jpg|80px]] || i486DX2-S (P24S) || 40/20 MHz,<br />50/25 MHz,<br />(''66/33 MHz'') || 5 V or 3.3 V || 8 KB WT || June 1993 || SL Enhanced 486DX2 |- | [[File:KL Intel i486SX PQFP.jpg|80px]] || i486SX-S (P23S)|| 25, 33 MHz || 5 V or 3.3 V || 8 KB WT || June 1993 || SL Enhanced 486SX |- | [[File:KL intel i486SX2.jpg|80px]] || i486SX2 || 50/25, 66/33 MHz || 5 V || 8 KB WT || March 1994 || i486DX2 with the FPU disabled. Early version used the 800 nm process technology.<ref>Intel Corporation, "Coming Attractions: Clock-Doubling Technology", Microcomputer Solutions, January/February 1992, page 6.</ref> |- | [[File:FC80486DX4-75 AK SX883 USA 1995 01 WT.jpg|80px]][[File:Intel i486 DX4 100 MHz SK051.jpeg|80px]]|| IntelDX4 (P24C) || 75/25, 100/33 MHz || 3.3 V || 16 KB WT || March 1994 || Designed to run at triple clock rate (not quadruple, as often believed; the DX3, which was meant to run at 2.5Γ the clock speed, was never released). DX4 models that featured write-back cache were identified by an "&EW" laser-etched into their top surface, while the write-through models were identified by "&E". |- | [[File:Intel i486 DX2 66 CPU SX955.jpg|80px]]|| i486DX2WB (P24D)|| 50/25 MHz,<br />66/33 MHz || 5 V || 8 KB WB || October 1994 || Enabled write-back cache. |- | || i486DX2 (P24LM) || 90/30 MHz,<br />100/33 MHz || 2.5β2.9 V || 8 KB WT || 1994 || |- | [[File:Intel i486 dx4 100mhz 2007 03 27.jpg|80px]] || IntelDX4WB || 100/33 MHz || 3.3 V || 16 KB WB || 1995 ||Enabled write-back cache. |- | [[File:KL Intel i486GX.jpg|80px]]|| i486GX || up to 33 MHz || 3.3 V || 8 KB WT || || Embedded ultra-low-power CPU with all features of the i486SX and 16-bit external data bus. This CPU is for embedded battery-operated and hand-held applications. |} <!-- Should we specify what is meant by the slashes in this table? Does 66/33 MHz mean internal (doubled) clock 66 MHz, external clock (oscillator and bus) 33 MHz, as I think it does? Why is i486DX2 (P24LM) listed with 30/90; 33/100 indicated in the reverse order? Does inclusion of that last processor in this list imply something errant about the comment later that only AMD made the 90/30 MHz grade? --Are the data in this table all Intel models, or are all other compatible processors included? Either a title should be added showing this to be a table of Intel models only, or a "Manufacturer" column should be added, I think. --> <!-- Was the 80486 the first Intel x86 CPU to be offered by Intel in a "mobile" version, optimized for battery-powered portable computers? The 386 might have had such an offering. -->
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