Editing Honeywell 6000 series (section)

===Instruction formats===
The 6000-series machine's basic instruction set has more than 185 single-address one-word instructions.<ref name=Guide />  The basic instructions are one word; the instruction format is an extension of that of the [[GE-600 series]], with the opcode field extended to 10 bits by adding bit 27 as the low-order bit; that bit is zero in all GE-600 series instructions.

The format for basic and one-word EIS instructions is:

<pre>
                         1 1         2 2 2 3    3
        0                7 8         7 8 9 0    5
       +------------------+-----------+-+-+------+
       |          Y       |  OP       |I|0| Tag  |
       +------------------+-----------+-+-+------+
</pre>
* '''Y''' is the address field (18 bits).
* '''OP''' is the opcode (10 bits).
* '''I''' is the interrupt inhibit bit.
* '''Tag''' indicates the type of address modification to be performed (6 bits); some tags not supported in the GE-600 series are supported by the 6000 series.

EIS instructions longer than one word are two-word to four-word instructions depending on the specific instruction. The addresses point either to operands or to ''operand descriptors'', which contain the actual operand address and additional information.  The format of those instructions is:
<pre>
                         1 1        2 2 2    3
 word   0                7 8        7 8 9    5
       +------------------+----------+-+------+
   0   |  Variable field  |  OP      |I| MF1  |
       +------------------+----------+-+------+
   1   |Operand descriptor 1 or indirect word |
       +--------------------------------------+
   2   .Operand descriptor 2 or indirect word . (optional)
       +- - - - - - - - - - - - - - - - - - - +
   3   .Operand descriptor 3 or indirect word . (optional)
       +- - - - - - - - - - - - - - - - - - - +
</pre>
* '''Variable field''' contains information relating to the specific instruction (18 bits).
* '''OP''' is the EIS opcode (10 bits).
* '''I''' is the interrupt inhibit bit.
* '''MF1''' describes the address modification to be performed for descriptor 1 (6 bits).  If operands 2 and 3 are present the variable field contains MF2 and MF3.