Editing X86 (section)

===Physical Address Extension (PAE)===
{{Main|Physical Address Extension}}
[[Physical Address Extension]] or PAE was first added in the Intel [[Pentium Pro]], and later by [[AMD]] in the Athlon processors,<ref name="Athlon PAE">{{cite book|chapter-url=http://pdf.datasheetcatalog.com/datasheet/AdvancedMicroDevices/mXvyvs.pdf|access-date=2017-04-13|author=AMD, Inc.|title=AMD Athlon™ Processor x86 Code Optimization Guide|chapter=Appendix E|page=250|date=February 2002|edition=Revision K|quote=A 2-bit index consisting of PCD and PWT bits of the page table entry is used to select one of four PAT register fields when PAE (page address extensions) is enabled, or when the PDE doesn’t describe a large page.|archive-date=April 13, 2017|archive-url=https://web.archive.org/web/20170413235648/http://pdf.datasheetcatalog.com/datasheet/AdvancedMicroDevices/mXvyvs.pdf|url-status=live}}</ref> to allow up to 64&nbsp;GB of RAM to be addressed. Without PAE, physical RAM in 32-bit protected mode is usually limited to 4&nbsp;[[gigabyte|GB]]. PAE defines a different page table structure with wider page table entries and a third level of page table, allowing additional bits of physical address. Although the initial implementations on 32-bit processors theoretically supported up to 64&nbsp;GB of RAM, chipset and other platform limitations often restricted what could actually be used. [[x86-64]] processors define page table structures that theoretically allow up to 52 bits of physical address, although again, chipset and other platform concerns (like the number of DIMM slots available, and the maximum RAM possible per DIMM) prevent such a large physical address space to be realized. On x86-64 processors PAE mode must be active before the switch to [[long mode]], and must remain active while [[long mode]] is active, so while in long mode there is no "non-PAE" mode. PAE mode does not affect the width of linear or virtual addresses.