Editing ARM architecture family (section)

==={{anchor|THUMB}}Thumb===
To improve compiled code density, processors since the ARM7TDMI (released in 1994<ref>{{cite web |url=http://www.atmel.com/Images/DDI0029G_7TDMI_R3_trm.pdf |title=ARM7TDMI Technical Reference Manual |page=ii}}</ref>) have featured the ''Thumb'' [[compressed instruction set]], which have their own state. (The "T" in "TDMI" indicates the Thumb feature.) When in this state, the processor executes the Thumb instruction set, a compact 16-bit encoding for a subset of the ARM instruction set.<ref>{{cite book |last=Jaggar |first=Dave |title=ARM Architecture Reference Manual |year=1996 |publisher=Prentice Hall |isbn=978-0-13-736299-8 |pages=6–1}}</ref> Most of the Thumb instructions are directly mapped to normal ARM instructions. The space saving comes from making some of the instruction operands implicit and limiting the number of possibilities compared to the ARM instructions executed in the ARM instruction set state.

In Thumb, the 16-bit opcodes have less functionality. For example, only branches can be conditional, and many opcodes are restricted to accessing only half of all of the CPU's general-purpose registers. The shorter opcodes give improved code density overall, even though some operations require extra instructions. In situations where the memory port or bus width is constrained to less than 32&nbsp;bits, the shorter Thumb opcodes allow increased performance compared with 32-bit ARM code, as less program code may need to be loaded into the processor over the constrained memory bandwidth.

Unlike processor architectures with variable length (16- or 32-bit) instructions, such as the Cray-1 and [[Hitachi]] [[SuperH]], the ARM and Thumb instruction sets exist independently of each other. Embedded hardware, such as the [[Game Boy Advance]], typically have a small amount of RAM accessible with a full 32-bit datapath; the majority is accessed via a 16-bit or narrower secondary datapath. In this situation, it usually makes sense to compile Thumb code and hand-optimise a few of the most CPU-intensive sections using full 32-bit ARM instructions, placing these wider instructions into the 32-bit bus accessible memory.

The first processor with a Thumb [[instruction decoder]] was the ARM7TDMI. All processors supporting 32-bit instruction sets, starting with ARM9, and including XScale, have included a Thumb instruction decoder. It includes instructions adopted from the Hitachi [[SuperH]] (1992), which was licensed by ARM.<ref name="lwn">{{cite web |url=http://lwn.net/Articles/647636 |title=Resurrecting the SuperH architecture |author=Nathan Willis |date=10 June 2015 |publisher=[[LWN.net]]}}</ref> ARM's smallest processor families (Cortex M0 and M1) implement only the 16-bit Thumb instruction set for maximum performance in lowest cost applications. ARM processors that don't support 32-bit addressing also omit Thumb.