Editing X86 (section)

===3DNow!===
{{Main|3DNow!}}
In 1997, AMD introduced 3DNow!.<ref>{{cite news |last1=Sexton |first1=Michael Justin Allen |title=The History Of AMD CPUs |url=https://www.tomshardware.com/picturestory/713-amd-cpu-history.html |access-date=5 June 2022 |work=Tom's Hardware |date=21 April 2017 |language=en}}</ref> The introduction of this technology coincided with the rise of [[3D computer graphics|3D]] entertainment applications and was designed to improve the CPU's [[vector processing]] performance of graphic-intensive applications. 3D video game developers and 3D graphics hardware vendors use 3DNow! to enhance their performance on AMD's [[AMD K6|K6]] and [[Athlon]] series of processors.<ref>{{cite news |last1=Shimpi |first1=Anand Lal |title=AMD's K6-2 350: Something to do... |url=https://www.anandtech.com/show/161/2 |access-date=5 June 2022 |work=AnandTech |date=29 October 1998}}</ref>

3DNow! was designed to be the natural evolution of MMX from integers to floating point. As such, it uses exactly the same register naming convention as MMX, that is MM0 through MM7.<ref>{{cite web |title=Intel's MMX and AMD's 3DNow! SIMD Operations |url=https://web.mit.edu/rhel-doc/3/rhel-as-en-3/i386-simd.html |website=web.mit.edu |access-date=5 June 2022}}</ref> The only difference is that instead of packing integers into these registers, two [[single-precision floating-point format|single-precision floating-point]] numbers are packed into each register. The advantage of aliasing the FPU registers is that the same instruction and data structures used to save the state of the FPU registers can also be used to save 3DNow! register states. Thus no special modifications are required to be made to operating systems which would otherwise not know about them.<ref>{{cite web |title=3DNow!™ Technology Manual |url=https://www.amd.com/system/files/TechDocs/21928.pdf |publisher=Advanced Micro Devices |access-date=5 June 2022}}</ref>