Editing PCI Express (section)

=== PCI Express 4.0 <span class="anchor" id="4.0"></span> ===
On 29 November 2011, PCI-SIG preliminarily announced PCI Express 4.0,<ref name="W466M" /> providing a 16&nbsp;GT/s bit rate that doubles the bandwidth provided by PCI Express 3.0 to 31.5&nbsp;GB/s in each direction for a 16-lane configuration, while maintaining backward and [[forward compatibility]] in both software support and used mechanical interface.<ref name="QNZsy" /> PCI Express 4.0 specs also bring OCuLink-2, an alternative to [[Thunderbolt (interface)|Thunderbolt]]. OCuLink version 2 has up to 16&nbsp;GT/s (16{{nbsp}}GB/s total for x8 lanes),<ref name="OCuLink2" /> while the maximum bandwidth of a Thunderbolt 3 link is 5{{nbsp}}GB/s.

In June 2016 Cadence, PLDA and Synopsys demonstrated PCIe 4.0 physical-layer, controller, switch and other IP blocks at the PCI SIG’s annual developer’s conference.<ref name="EE_4+5" />
 
[[Mellanox Technologies]] announced the first 100{{nbsp}}Gbit/s network adapter with PCIe 4.0 on 15 June 2016,<ref name="FZ4hQ" /> and the first 200{{nbsp}}Gbit/s network adapter with PCIe 4.0 on 10 November 2016.<ref name="zovf4" />

In August 2016, [[Synopsys]] presented a test setup with FPGA clocking a lane to PCIe 4.0 speeds at the [[Intel Developer Forum]]. Their IP has been licensed to several firms planning to present their chips and products at the end of 2016.<ref name="heise_idf_2016" />

On the IEEE Hot Chips Symposium in August 2016 [[IBM]] announced the first CPU with PCIe 4.0 support, [[POWER9]].<ref name="HC28-IBM-Power9">{{Cite web|url=https://old.hotchips.org/wp-content/uploads/hc_archives/hc28/HC28.23-Tuesday-Epub/HC28.23.90-High-Perform-Epub/HC28.23.921-.POWER9-Thompto-IBM-final.pdf|title=Brian Thompto, POWER9 Processor for the Cognitive Era}}</ref><ref name="IEEE-Power9">[https://ieeexplore.ieee.org/xpl/conhome/7932734/proceeding 2016 IEEE Hot Chips 28 Symposium (HCS), 21–23 Aug. 2016]</ref>

PCI-SIG officially announced the release of the final PCI Express 4.0 specification on 8 June 2017.<ref name="TR_pcie4" /> The spec includes improvements in flexibility, scalability, and lower-power.

On 5 December 2017 IBM announced the first system with PCIe 4.0 slots, Power AC922.<ref name="2HOSh" /><ref name="IBM-ZG17-0147">{{Cite web|url=https://www.ibm.com/docs/en/announcements/archive/ENUSZG17-0147|title=IBM Power System AC922 (8335-GTG) server helps you to harness breakthrough accelerated AI, HPDA, and HPC performance for faster time to insight|date=2017-12-05|access-date=2025-04-25|website=www.ibm.com|archive-url=https://web.archive.org/web/20240627011358/https://www.ibm.com/docs/en/announcements/archive/ENUSZG17-0147|archive-date=2024-06-27|url-status=live}}</ref>

NETINT Technologies introduced the first [[NVM Express|NVMe]] SSD based on PCIe 4.0 on 17 July 2018, ahead of Flash Memory Summit 2018<ref name="ChNhD" />

[[Advanced Micro Devices|AMD]] announced on 9 January 2019 its upcoming [[Zen 2]]-based processors and X570 chipset would support PCIe 4.0.<ref name="Akskd" /> AMD had hoped to enable partial support for older chipsets, but instability caused by motherboard traces not conforming to PCIe 4.0 specifications made that impossible.<ref name="KDBMK" /><ref name="CAY71" />

Intel released their first mobile CPUs with PCI Express 4.0 support in mid-2020, as a part of the [[Tiger Lake (microprocessor)|Tiger Lake]] microarchitecture.<ref name="C02lC" />