Editing Flash memory (section)

===Standardization===
A group called the [[Open NAND Flash Interface Working Group]] (ONFI) has developed a standardized low-level interface for NAND&nbsp;flash chips. This allows interoperability between conforming NAND devices from different vendors. The ONFI specification version 1.0<ref>{{cite web |url=http://onfi.org/wp-content/uploads/2009/02/onfi_1_0_gold.pdf |title=Open NAND Flash Interface Specification |publisher=Open NAND Flash Interface |date=28 December 2006 |access-date=31 July 2010 |url-status=dead |archive-url=https://web.archive.org/web/20110727145313/http://onfi.org/wp-content/uploads/2009/02/onfi_1_0_gold.pdf |archive-date=27 July 2011}}</ref> was released on 28 December 2006. It specifies:

* A standard physical interface ([[pinout]]) for NAND flash in [[Thin small-outline package|TSOP]]-48, WSOP-48, [[Land grid array|LGA]]-52, and [[Ball grid array|BGA]]-63 [[IC package|packages]]
* A standard command set for reading, writing, and erasing NAND flash chips
* A mechanism for self-identification (comparable to the [[serial presence detect]]ion feature of SDRAM memory modules)

The ONFI group is supported by major NAND flash manufacturers, including [[Hynix]], [[Intel]], [[Micron Technology]], and [[Numonyx]], as well as by major manufacturers of devices incorporating NAND&nbsp;flash chips.<ref>A list of ONFi members is available at {{cite web |url=http://onfi.org/membership/ |title=Membership - ONFi |access-date=2009-09-21 |url-status=live |archive-url=https://web.archive.org/web/20090829141114/http://onfi.org/membership/ |archive-date=29 August 2009}}</ref>

Two major flash device manufacturers, [[Toshiba]] and [[Samsung]], have chosen to use an interface of their own design known as Toggle Mode (and now Toggle). This interface isn't [[Pin compatibility#Pin-to-pin compatibility|pin-to-pin compatible]] with the ONFI specification. The result is that a product designed for one vendor's devices may not be able to use another vendor's devices.<ref name="toshiba-20100811">{{Cite press release |date=11 August 2010 |title=Toshiba Introduces Double Data Rate Toggle Mode NAND in MLC And SLC Configurations |url=http://www.toshiba.com/taec/news/press_releases/2010/memy_10_599.jsp |url-status=dead |archive-url=https://web.archive.org/web/20151225111800/http://www.toshiba.com/taec/news/press_releases/2010/memy_10_599.jsp |archive-date=25 December 2015 |publisher=[[Toshiba]] |place=Irvine, Calif. }}</ref>

A group of vendors, including [[Intel]], [[Dell]], and [[Microsoft]], formed a [[NVM Express|Non-Volatile Memory Host Controller Interface]] (NVMHCI) Working Group.<ref name="microsoft-20070530">{{Cite press release |date=30 May 2007 |title=Dell, Intel And Microsoft Join Forces To Increase Adoption of NAND-Based Flash Memory in PC Platforms |url=https://news.microsoft.com/2007/05/30/dell-intel-and-microsoft-join-forces-to-increase-adoption-of-nand-based-flash-memory-in-pc-platforms/ |url-status=live |archive-url=https://web.archive.org/web/20230603210924/https://news.microsoft.com/2007/05/30/dell-intel-and-microsoft-join-forces-to-increase-adoption-of-nand-based-flash-memory-in-pc-platforms/ |archive-date=3 June 2023 |access-date=12 August 2014 |publisher=[[Microsoft]] |location=Redmond, Wash }}</ref> The goal of the group is to provide standard software and hardware programming interfaces for nonvolatile memory subsystems, including the "flash cache" device connected to the [[PCI Express]] bus.