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=== Fundamental TTL gate === [[File:TTL npn nand.svg|thumb|Two-input TTL [[NAND gate]] with a simple output stage (simplified)]] TTL inputs are the emitters of bipolar transistors. In the case of NAND inputs, the inputs are the emitters of [[multiple-emitter transistor]]s, functionally equivalent to multiple transistors where the bases and collectors are tied together.<ref>{{citation |title=Electronic Principles Physics, Models, and Circuits |edition=1st |year=1969 |last1=Gray |first1=Paul E. |last2=Searle |first2=Campbell L. |publisher=Wiley |isbn=978-0471323983 |page=870}}</ref> The output is buffered by a [[common emitter]] amplifier. '''Inputs both logical ones.''' When all the inputs are held at high voltage, the base–emitter junctions of the multiple-emitter transistor are reverse-biased. Unlike DTL, a small “collector” current (approximately 10 μA) is drawn by each of the inputs. This is because the transistor is in [[Bipolar junction transistor#Regions of operation|reverse-active mode]]. An approximately constant current flows from the positive rail, through the resistor and into the base of the multiple emitter transistor.<ref>{{harvnb|Buie|1966|loc=column 4}}</ref> This current passes through the base–emitter junction of the output transistor, allowing it to conduct and pulling the output voltage low (logical zero). '''An input logical zero.''' Note that the base–collector junction of the multiple-emitter transistor and the base–emitter junction of the output transistor are in series between the bottom of the resistor and ground. If one input voltage becomes zero, the corresponding base–emitter junction of the multiple-emitter transistor is in parallel with these two junctions. A phenomenon called current steering means that when two voltage-stable elements with different threshold voltages are connected in parallel, the current flows through the path with the smaller threshold voltage. That is, current flows out of this input and into the zero (low) voltage source. As a result, no current flows through the base of the output transistor, causing it to stop conducting and the output voltage becomes high (logical one). During the transition the input transistor is briefly in its active region; so it draws a large current away from the base of the output transistor and thus quickly discharges its base. This is a critical advantage of TTL over DTL that speeds up the transition over a diode input structure.<ref>{{citation |last=Millman |first=J. |title=Microelectronics: Digital and Analog Circuits and Systems |location=New York |publisher=McGraw-Hill Book Company |year=1979 |isbn=0-07-042327-X |page=[https://archive.org/details/microelectronics0000mill/page/147 147] |url=https://archive.org/details/microelectronics0000mill }}</ref> The main disadvantage of TTL with a simple output stage is the relatively high output resistance at output logical "1" that is completely determined by the output collector resistor. It limits the number of inputs that can be connected (the [[fanout]]). Some advantage of the simple output stage is the high voltage level (up to V<sub>CC</sub>) of the output logical "1" when the output is not loaded.
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