Editing IBM 1620 (section)

===Memory access===
Memory was accessed two decimal digits at the same time (even-odd digit pair for numeric data or one ''[[alphanumeric|alphameric]]'' character for text data). Each decimal digit was six bits, composed of an odd parity '''C'''heck bit, a '''F'''lag bit, and four BCD bits for the value of the digit in the following format:<ref name=Physics>"The main memory was logically arranged as 20,000 6-bit words. Each word comprised four BCD data bits, a "flag" bit, and an odd parity check bit. Though this was its logical arrangement, physically memory was a 100x100 array of 12-bit ferrite core words, which causes a few quirks in the instruction set. All instructions occupied 12 consecutive digits of memory, and were required to start at an even address so that the two-digit opcode could be read in one 12-bit physical word." {{cite web |url=https://www.physics.smu.edu/fattarus/ibm1620.html |title=The IBM 1620 Model 1{{snd}} Physics @ SMU}}</ref>

   '''C F 8 4 2 1'''

The '''F'''lag bit had several uses:

* In the least significant digit it was set to indicate a negative number ([[sign-and-magnitude|signed magnitude]]).
* It was set to mark the most significant digit of a number (''[[word mark (computer hardware)|word mark]]'').
* In the least significant digit of five-digit addresses it was set for [[addressing mode#Memory indirect|indirect address]]ing (an option on the [[#Model I|Model I]], standard on the 1620 Model II). Multi-level indirection<ref name=IBM.intro59/> could be used (the machine could even be put into an infinite indirect addressing loop).
* In the middle three digits of five-digit addresses (on the [[IBM 1620 Model II|1620 II]]) they were set to select one of seven [[index register]]s.

In addition to the valid BCD digit values there were three ''special'' digit values (these could {{em|not}} be used in calculations):

   C F 8 4 2 1
       1 0 1 0 {{snd}} [[Recordmark character|Record Mark]] (right most end of record, prints as a [[double dagger]] symbol, ‡)
       1 1 0 0 {{snd}} Numeric Blank (blank for punched card output formatting)
       1 1 1 1 {{snd}} [[Groupmark character|Group Mark]] (right most end of a group of records for disk I/O)

[[Instruction set|Instructions]] were fixed length (12 decimal digits), consisting of a two-digit "[[opcode|op code]]", a five-digit "P Address" (usually the ''destination'' address), and a five-digit "Q Address" (usually the ''source'' address or the ''source'' immediate value). Some instructions, such as the B (branch) instruction, used only the P Address, and later smart assemblers included a "B7" instruction that generated a seven-digit branch instruction (op code, P address, and one extra digit because the next instruction had to start on an even-numbered digit).

[[Fixed-point arithmetic|Fixed-point]] data "words" could be any size from two decimal digits up to all of memory not used for other purposes.

[[Floating-point arithmetic|Floating-point]] data "words" (using the hardware [[floating-point arithmetic|floating-point]] option) could be any size from 4 decimal digits up to 102 decimal digits (2 to 100 digits for the [[Significand|mantissa]] and two digits for the [[exponent]]).

The Fortran II compiler offered limited access to this flexibility via a "Source Program Control Card" preceding the Fortran source in a fixed format:

 *ffkks

The * in column one, ''ff''  the number of digits for the mantissa of floating-point numbers (allowing 02 to 28), ''kk'' the number of digits for fixed-point numbers (allowing 04 to 10) and ''s'' is to specify the memory size of the computer to run the code if not the current computer: 2, 4, or 6 for memories of 20,000 or 40,000 or 60,000 digits.

The machine had no programmer-accessible registers: all operations were memory to memory (including the [[index register]]s of the [[IBM 1620 Model II|1620 II]]).

:''See [[#Architectural difficulties|Architectural difficulties]] section''