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=== Modern EEPROM === The first EEPROM that used [[Field electron emission#Fowler–Nordheim tunneling|Fowler-Nordheim tunnelling]] to erase data was invented by Bernward and patented by [[Siemens]] in 1974.<ref>{{Cite patent|number=GB1517925A|title=Storage field effect transistors|gdate=1978-07-19|url=https://patents.google.com/patent/GB1517925A/en}}</ref> In February 1977, Israeli-American [[Eli Harari|Eliyahou Harari]] at [[Hughes Aircraft Company]] patented in the US a modern EEPROM technology, based on Fowler-Nordheim tunnelling through a thin [[silicon dioxide]] layer between the [[Floating-gate MOSFET|floating-gate]] and the [[wafer (electronics)|wafer]]. Hughes went on to produce this new EEPROM devices.<ref>{{cite web |url=http://archive.computerhistory.org/resources/access/text/2012/03/102745933-05-01-acc.pdf |title= 1027459330501acc.pdf |access-date=2015-02-05 |url-status=live |archive-url=http://archive.wikiwix.com/cache/20150207004103/http://archive.computerhistory.org/resources/access/text/2012/03/102745933-05-01-acc.pdf |archive-date=2015-02-07 }}</ref> In May 1977, some important research result was disclosed by [[Fairchild Camera and Instrument|Fairchild]] and [[Siemens]]. They used ''SONOS'' ([[polysilicon]]-[[Silicon oxynitride|oxynitride]]-[[nitride]]-[[oxide]]-[[silicon]]) structure with thickness of silicon dioxide less than 30 [[Ångström|Å]], and ''SIMOS'' (stacked-gate [[Hot-carrier injection|injection]] [[MOSFET|MOS]]) structure, respectively, for using [[Field electron emission#Fowler–Nordheim tunneling|''Fowler-Nordheim tunnelling'']] [[hot-carrier injection]].<ref> {{cite journal|last1=Chen|first1=P. C. Y.|title=Threshold-alterable Si-gate MOS devices|journal=IEEE Transactions on Electron Devices|date=May 1977|volume=24|issue=5|pages=584–586|doi=10.1109/T-ED.1977.18783|issn=0018-9383|bibcode=1977ITED...24..584C|s2cid=25586393}} </ref><ref> {{cite journal|last1=Rossler|first1=B.|title=Electrically erasable and reprogrammable read-only memory using the n-channel SIMOS one-transistor cell|journal=IEEE Transactions on Electron Devices|date=May 1977|volume=24|issue=5|pages=606–610|doi=10.1109/T-ED.1977.18788|issn=0018-9383|bibcode=1977ITED...24..606R|s2cid=33203267}} </ref> Around 1976 to 1978, Intel's team, including [[George Perlegos]], made some inventions to improve this tunneling E<sup>2</sup>PROM technology.<ref> {{cite web|last1=Simko|first1=Richard T.|title=Electrically programmable and electrically erasable MOS memory cell|url=https://patents.google.com/patent/US4119995A/en|date=17 March 1977}} </ref><ref> {{cite web|last1=Frohman-Bentchkowsky|first1=Dov|last2=Mar|first2=Jerry|last3=Perlegos|first3=George|last4=Johnson|first4=William S.|title=Electrically programmable and erasable MOS floating gate memory device employing tunneling and method of fabricating same|url=https://patents.google.com/patent/US4203158A/en|date=15 December 1978}} </ref> In 1978, they developed a 16K (2K word × 8) bit ''Intel 2816'' chip with a thin [[silicon dioxide]] layer, which was less than 200 [[Ångström|Å]].<ref> {{cite book|last1=Dummer|first1=G. W. A.|title=Electronic Inventions and Discoveries: Electronics from Its Earliest Beginnings to the Present Day|date=2013|publisher=Elsevier|isbn=9781483145211|url=https://books.google.com/books?id=PbYgBQAAQBAJ&q=Intel+FLOTOX&pg=PA212|language=en}} </ref> In 1980, this structure was publicly introduced as ''FLOTOX''; [[Floating-gate MOSFET|floating gate]] [[Tunnel junction|tunnel]] [[oxide]].<ref> {{cite book|last1=Johnson|first1=W.|last2=Perlegos|first2=G.|last3=Renninger|first3=A.|last4=Kuhn|first4=G.|last5=Ranganath|first5=T.|title=1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers |chapter=A 16Kb electrically erasable nonvolatile memory |date=1980|volume=XXIII|pages=152–153|doi=10.1109/ISSCC.1980.1156030|s2cid=44313709}} </ref> The ''FLOTOX'' structure improved reliability of erase/write cycles per byte up to 10,000 times.<ref> {{cite book|last1=Euzent|first1=B.|last2=Boruta|first2=N.|last3=Lee|first3=J.|last4=Jenq|first4=C.|chapter=Reliability Aspects of a Floating Gate E2 PROM |title=19th International Reliability Physics Symposium|date=1981|pages=11–16|doi=10.1109/IRPS.1981.362965|s2cid=41116025|quote=The Intel 2816 uses the FLOTOX structure, which has been discussed in detail in the literaturel. Basically, it uses an oxide of less than 200A thick between the floating polysilicon gate and the N+ region as shown in Figure 1.}} </ref> But this device required additional 20{{endash}}22V V<sub>PP</sub> bias voltage supply for byte erase, except for 5V read operations.<ref> {{cite book|title=2816A-2 PDF Datasheet - Intel Corporation - Datasheets360.com|date=October 1983|publisher=Intel|url=http://www.datasheets360.com/pdf/3161437977278813752}} </ref>{{rp|5{{hyphen}}86}} In 1981, Perlegos and 2 other members left Intel to form [[Atmel#Founding and 1980s growth|Seeq Technology]],<ref> {{cite web|url=http://www.antiquetech.com/?page_id=900|title=Seeq Technology » AntiqueTech|url-status=live|archive-url=https://web.archive.org/web/20141002212230/http://www.antiquetech.com/?page_id=900|archive-date=2014-10-02}}</ref> which used on-device [[charge pump]]s to supply the high voltages necessary for programming E<sup>2</sup>PROMs. In 1984, Perlogos left Seeq Technology to found [[Atmel]], then Seeq Technology was acquired by Atmel.<ref>{{Cite journal |last = Rostky |first = George |title = Remembering the PROM knights of Intel |journal = EE Times |date = July 2, 2002 |url = http://www.eetimes.com/issue/fp/showArticle.jhtml;?articleID=18307418 |access-date = 2007-02-08 |url-status = live |archive-url = https://web.archive.org/web/20070929104409/http://www.eetimes.com/issue/fp/showArticle.jhtml;?articleID=18307418 |archive-date = September 29, 2007 }}</ref><ref> {{cite book|title=Atmel AT28C16 datasheet|date=October 1998|edition=0540B|url=http://cva.stanford.edu/classes/cs99s/datasheets/at28c16.pdf|url-status=live|archive-url=https://web.archive.org/web/20170829005334/http://cva.stanford.edu/classes/cs99s/datasheets/at28c16.pdf|archive-date=2017-08-29}} </ref> Electrically alterable read-only memory (EAROM) is a type of EEPROM that can be modified one or a few [[bit]]s at a time.<ref>{{cite book | url=https://books.google.com/books?id=ocjJE4KtZq4C&dq=Electrically+alterable+read-only+memory+%28EAROM%29&pg=PA130 | title=Ciarcia's Circuit Cellar | isbn=978-0-07-010963-6 | last1=Ciarcia | first1=Steve | date=1981 | publisher=Circuit Cellar }}</ref> Writing is a very slow process and again needs higher voltage (usually around 12 [[Volt|V]]) than is used for read access. EAROMs are intended for applications that require infrequent and only partial rewriting.
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