Editing Acorn Archimedes (section)

=== Floating-point arithmetic ===

The Archimedes did not provide hardware support for [[floating-point arithmetic]] as standard, but the system was designed so that one might be added, with a floating-point co-processor instruction set architecture having been defined by Acorn for programs to use. As part of the system architecture, a software module provides an emulation of such a co-processor, handling floating-point instructions unsupported in hardware using software written using conventional ARM instructions. The co-processor was described as a "cut-down" ARM with only eight registers available instead of sixteen, offering instructions to transfer values to and from memory (supporting single, double, extended double and packed [[binary-coded decimal]] representations<ref name="acornuser198905_fp">{{ cite magazine | url=https://archive.org/details/AcornUser082-May89/page/n86/mode/1up | title=Arithmetic on the Dot | magazine=Acorn User | date=May 1989 | access-date=7 May 2021 | last1=Chappell | first1=Tim | pages=85–86 }}</ref>), to transfer values between the main CPU and co-processor, to transfer status information from the co-processor, to perform unary and binary operations on values, and to perform comparisons.<ref name="acornuser198904_fp">{{ cite magazine | url=https://archive.org/details/AcornUser081-Apr89/page/n67/mode/2up | title=Get to the Point | magazine=Acorn User | date=April 1989 | access-date=3 May 2021 | last1=Chappell | first1=Tim | pages=66–69 }}</ref>

In the first generation of Archimedes 300 and 400 series machines, only the 400 series had the appropriate expansion capability to add a floating-point unit (FPU) or co-processor, although the emulator was supported on all models.<ref name="acorn_app118_issue3">{{ cite book | url=http://chrisacorns.computinghistory.org.uk/docs/Acorn/Brochures/Acorn_APP118_ArchimedesNov87.pdf | title=High Performance Computer Systems | publisher=Acorn Computers Limited | date=November 1987 | issue=3 | access-date=3 May 2021 | pages=11 | quote=All ARCHIMEDES systems have a floating-point emulator as standard. On the 400 Series, complex mathematical calculations can be further enhanced by the addition of a floating-point unit (FPU). }}</ref> The expansion capability was retained in the 400/1 series.<ref name="acorn_app230">{{ cite book | url=http://chrisacorns.computinghistory.org.uk/docs/Acorn/Brochures/Acorn_APP230_Archimedes4001.pdf | title=High Performance Computer Systems Archimedes 400/1 Series | publisher=Acorn Computers Limited | date=September 1989 | issue=1 | access-date=3 May 2021 | pages=3 }}</ref> The FPU expansion card was delivered for the R140 workstation and 400 series in 1989, priced at £599 plus VAT, and was based on the WE32206,<ref name="APP221">{{ cite book | url=http://chrisacorns.computinghistory.org.uk/docs/Acorn/Brochures/Acorn_APP221_R140ComputerSystemsJun89.pdf | title=R140 Computer Systems | publisher=Acorn Computers Limited | edition=3 | date=June 1989 | access-date=6 September 2020 }}</ref> with a "protocol converter chip" being used to translate between the ARM and the WE32206.<ref name="newcompexpress19880203">{{ cite magazine | url=https://archive.org/details/NH2021_New_Computer_Express_Issue065.pdf/page/n17/mode/2up | title=ARM3 versus FPU | magazine=New Computer Express | date=3 February 1988 | access-date=3 May 2021 | last1=Carrot | first1=Bertram | pages=18 }}</ref> The WE32206 card was also offered for Acorn's Springboard expansion card for IBM PC compatibles.<ref name="pcw198801">{{ cite magazine | url=https://archive.org/details/bitsavers_acornAcornboard_256399/mode/2up | title=Acorn Springboard | magazine=Personal Computer World | date=January 1988 | access-date=3 May 2021 | last1=Pountain | first1=Dick | pages=118–120 }}</ref> Although Acorn had expected that interfacing the ARM to an existing FPU chip would be "a much quicker route" to delivering a hardware-based floating-point solution than developing a new co-processor, the complexity involved in developing the custom gate array responsible for interfacing to the WE32206 was apparently greater than anticipated, taking two years to deliver.<ref name="abcomputing199003_arm">{{ cite magazine | title=Programming The ARM: The Floating Point Co-processor | magazine=A&B Computing | last1=Fellows | first1=Paul | date=March 1990 | pages=43–44 }}</ref>

Reviews of the FPU were generally unenthusiastic, noting that Acorn's claims of an eight-fold speed-up were unlikely to be achieved in "a practical program", nevertheless reporting that programs performing repeated floating-point operations yielded speed-ups ranging from around four to sixteen times that of a base ARM2-based system.<ref name="riscuser198912_fpu">{{ cite magazine | url=https://archive.org/details/risc-user-vol-3-iss-02-dec-89/page/49/mode/1up | title=Acorn's Floating Point Unit | magazine=RISC User | date=December 1989 | access-date=18 October 2022 | last1=Spencer | first1=David | pages=49 }}</ref> Somewhat more applied testing demonstrated speed-ups for benchmark programs of up to eight times, aligning with Acorn's claims, but contrasted these gains with the broader performance increases attainable from an ARM3 upgrade, these offering a more general four-fold speed improvement. Largely focusing on BASIC programming, one reviewer concluded that the FPU was "all but obsolete" with the availability of the ARM3 upgrade.<ref name="archive199011_fpu">{{ cite magazine | url=https://archive.org/details/Archive_1990-11_OCR/page/n44/mode/1up | title=Hardware Column | magazine=Archive | date=November 1990 | access-date=18 October 2022 | last1=Cowan | first1=Brian | pages=43–44 }}</ref> Another conceded that some but not all C programs would benefit from the FPU since "a good programmer will avoid using floating point instructions if at all possible", suggesting that Acorn's R140 workstation would benefit more from the upgrade.<ref name="riscuser198912_fpu"/> However, BASIC programs compiled using the Archimedes BASIC Compiler achieved over nine-fold speed-ups for certain benchmarks, unlike those running on the standard BASIC interpreter whose floating-point routines avoided using FPU instructions, thus delivering no real performance improvements with the FPU fitted.<ref name="abcomputing199003_arm"/>

The Archimedes models based on the ARM3 processor supported a completely new "arithmetic co-processor" or "floating-point accelerator" known as the FPA. Released in 1993 for the R260 workstation and the A540 and A5000 machines, priced at £99 plus VAT, the FPA device—known specifically as the FPA10—was fitted in a dedicated socket on the processor card for the R260 and A540, or in a motherboard socket in the A5000. It offered a peak throughput of 5&nbsp;[[MFLOPS]] at 26&nbsp;MHz.<ref name="acorn_fpa10">{{ cite press release | url=http://chrisacorns.computinghistory.org.uk/docs/Acorn/PR/FPA_release.txt | title=Acorn Releases Floating Point Accelerator | publisher=Acorn Computers Limited | date=5 July 1993 | access-date=7 April 2021 }}</ref> The models officially supporting the FPA had been introduced some time prior to availability of the device, and various ARM3 upgrade cards for earlier models had also been made available with an FPA socket in anticipation of eventual availability.<ref name="acornuser199211_fpa">{{ cite magazine | url=https://archive.org/details/AcornUser124-Nov92/page/n15/mode/1up | title=Upgrade for FPA | magazine=Acorn User | date=November 1992 | access-date=26 June 2021 | pages=12 }}</ref> Fabrication of the device was performed by GEC Plessey Semiconductors and was reported to be in "an advanced stage of production" in early 1993.<ref name="acornuser199306_fpa">{{ cite magazine | url=https://archive.org/details/AcornUser131-Jun93/page/n8/mode/1up | title=FPA Floats this Way | magazine=Acorn User | date=June 1993 | access-date=26 June 2021 | pages=7 }}</ref> Availability remained unclear, with ARM releasing technical details indicating that the chip, at 134,000 [[transistors]] was reportedly "Arm's most complex IC to date" and comparing its performance at "around 4&nbsp;MFLOPS" to the MIPS R3010 floating-point co-processor, whilst claiming a substantial power consumption advantage.<ref name="acornuser199308_fpa">{{ cite magazine | url=https://archive.org/details/AcornUser133-Aug93/page/n8/mode/1up | title=Acorn Skips Generation to 700 | magazine=Acorn User | date=August 1993 | access-date=26 June 2021 | pages=7 }}</ref> Further details were given upon the eventual release of the FPA10, stating a 26&nbsp;MHz operating frequency and a power consumption of 250&nbsp;mW. Reception from major software producers such as Computer Concepts and Colton Software was cautious, with the former's products not making any use of floating-point instructions and thus not standing to benefit, and with the latter's using such instructions but indicating skepticism about any significant benefits in performance.<ref name="acornuser199309_fpa">{{ cite magazine | url=https://archive.org/details/AcornUser134-Sep93/page/n8/mode/1up | title=FPA10 Brings Faster Maths | magazine=Acorn User | date=September 1993 | access-date=26 June 2021 | pages=7 }}</ref>

Observations from testing the FPA10 confirmed that applications such as Resultz and PipeDream 4—both Colton Software products—and other spreadsheets, whilst ostensibly standing to benefit as number processing applications, exhibited "no noticeable speed improvements", this being attributed to these applications' avoidance of unnecessary calculation and the more significant overhead of servicing a graphical user interface. Other programs such as Draw and ArtWorks—a Computer Concepts product—used their own arithmetic routines instead of the floating-point emulator (FPE) and, as anticipated, were therefore unable to take advantage of the accelerated floating-point instructions. However, various free of charge or low-cost programs [[porting|ported]] from other systems, such as [[POV-Ray]], plus selected native applications such as Clares' Illusionist and Oak Solutions' WorraCAD, did exhibit substantial performance gains from the FPA with speed-ups of between five and ten times. Programs compiled by Intelligent Interfaces' Fortran compiler were reported as running "some routines up to 20 times faster with the FPA10".<ref name="acornuser199310_fpa"/> Although the FPA10 only implemented arithmetic operations, delegating trigonometric operations to the FPE, it was able to operate concurrently with the main CPU and maintained its own instruction pipeline, allowing the CPU to proceed with other instructions until a floating-point instruction result was required.<ref name="riscuser199310_fpa"/> Speculative execution was also employed to improve performance.<ref name="harrod93">{{ Cite conference | url=https://ieeexplore.ieee.org/document/590407 | book-title=Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93 | last1=Harrod | first1=P. L. | last2=Baum | first2=A. J. | last3=Biggs | first3=J. P. | last4=Howard | first4=D. W. | last5=Merritt | first5=A. J. | last6=Oldham | first6=H. E. | last7=Seal | first7=D. J. | last8=Watters | first8=H. L. | title=FPA10-A 4 MFLOP floating point coprocessor for ARM | doi=10.1109/CICC.1993.590407 | isbn=0-7803-0826-3 | date=1993 | access-date=13 January 2025 | pages=4.3.1–4.3.4 }}</ref><ref name="gps_fpa10">{{ cite book | url=http://chrisacorns.computinghistory.org.uk/docs/GECPlessey/GECPlessey_FPA10DataSheet.pdf | title=ARM FPA10 Data Sheet | publisher=GEC Plessey Semiconductors | date=11 June 1993 | issue=1 | access-date=13 January 2025 }}</ref>

Observed BASIC program performance remained in line with experiences from the earlier FPU solution. The BASIC VI (or Basic64) interpreter bundled with RISC OS which was "much slower than Basic V normally", with the former using the FPE and the latter providing its own floating-point arithmetic routines, ended up "slightly faster" than BASIC V due to observed speed-ups of around four to around eleven times, with non-trigonometric operations benefiting the most in one analysis.<ref name="acornuser199310_fpa"/> Another analysis employing benchmarks of individual arithmetic and trigonometric operations indicated a more uniform distribution of performance improvements for BASIC VI programs, also noting that BASIC VI delivered more precision than BASIC V in its floating-point representation.<ref name="riscuser199310_fpa">{{ cite magazine | url=https://archive.org/details/risc-user-vol-6-iss-10-1993-october/page/n22/mode/2up | title=The New Acorn Floating Point Accelerator | magazine=RISC User | date=October 1993 | access-date=9 November 2023 | last1=Spencer | first1=David | pages=22–23 }}</ref> The product was perceived as "good value" but having restricted usefulness with the general lack of support in many applications, these employing their own routines and techniques to attempt to provide performant arithmetic on the base hardware platform, and a lack of incentive amongst software producers to offer support without a large enough market of users having the FPA fitted.<ref name="acornuser199310_fpa">{{ cite magazine | url=https://archive.org/details/AcornUser135-Oct93/page/n64/mode/1up | title=Float On | magazine=Acorn User | date=October 1993 | access-date=26 June 2021 | last1=Burley | first1=Ian | pages=63 }}</ref>

With the FPA10 having finally become available but only rated to run at 26&nbsp;MHz, and with ARM3 upgrades being delivered at frequencies as high as 35&nbsp;MHz,<ref name="acornuser199306_ifel" /> a higher-rated part, the FPA11, supporting 33&nbsp;MHz operation was developed<ref name="acornuser199509_range">{{ cite magazine | url=https://archive.org/details/AcornUser159-Sep95/page/n8/mode/1up | title=Acorn broadens its range | magazine=Acorn User | date=September 1995 | access-date=11 October 2021 | pages=9 }}</ref> and apparently delivered in products such as a processor card upgrade for the A540.<ref name="acorn_fpa11_a540">{{ cite web | url=http://www.computinghistory.org.uk/det/36127/Acorn%20A500%20ARM3%20CPU%20with%20FPA11/ | title=Acorn A500 ARM3 CPU with FPA11 | website=Chris's Acorns | access-date=11 October 2021 }}</ref> ARM3 upgrades were also produced with 33&nbsp;MHz ARM3 processors, but unlike their 25&nbsp;MHz counterparts which were available with FPA10 co-processors already fitted, these faster cards were not supplied with FPA11 co-processors, perhaps due to availability issues with the faster part.<ref name="acornuser199705_simtec" />