Editing MIPS architecture (section)

== Simulators ==

Open Virtual Platforms (OVP)<ref>{{cite web |url=http://www.OVPworld.org |title=OVP: Fast Simulation, Free Open Source Models. Virtual Platforms for software development |publisher=Ovpworld.org |access-date=May 30, 2012 |url-status=live |archive-url=https://web.archive.org/web/20120608022021/http://www.ovpworld.org/ |archive-date=June 8, 2012  }}</ref> includes the freely available for non-commercial use simulator [[OVPsim]], a library of models of processors, peripherals and platforms, and APIs which enable users to develop their own models. The models in the library are open source, written in C, and include the MIPS 4K, 24K, 34K, 74K, 1004K, 1074K, M14K, microAptiv, interAptiv, proAptiv 32-bit cores and the MIPS 64-bit 5K range of cores. These models are created and maintained by Imperas<ref>{{cite web |url=http://www.imperas.com |title=Imperas |publisher=Imperas |date=March 3, 2008 |access-date=May 30, 2012 |url-status=live |archive-url=https://web.archive.org/web/20120614212338/http://www.imperas.com/ |archive-date=June 14, 2012  }}</ref> and in partnership with MIPS Technologies have been tested and assigned the MIPS-Verified mark. Sample MIPS-based platforms include both bare metal environments and platforms for booting unmodified Linux binary images. These platforms–emulators are available as source or binaries and are fast, free for non-commercial usage, and are easy to use. OVPsim is developed and maintained by [[Imperas]] and is very fast (hundreds of million of instructions per second), and built to handle multicore homogeneous and heterogeneous architectures and systems.

There is a freely available MIPS32 simulator (earlier versions simulated only the R2000/R3000) called [[SPIM]] for use in education. EduMIPS64<ref>{{cite web |url=http://www.edumips.org |title=EduMIPS64 |publisher=Edumips.org |access-date=May 30, 2012 |url-status=live |archive-url=https://web.archive.org/web/20120507013250/http://www.edumips.org/ |archive-date=May 7, 2012  }}</ref> is a GPL graphical cross-platform MIPS64 CPU simulator, written in Java/Swing. It supports a wide subset of the MIPS64 ISA and allows the user to graphically see what happens in the pipeline when an assembly program is run by the CPU.

MARS<ref>{{cite web |url=http://courses.missouristate.edu/KenVollmar/MARS/ |title=MARS MIPS simulator - Missouri State University |publisher=Courses.missouristate.edu |access-date=May 30, 2012 |url-status=live |archive-url=https://web.archive.org/web/20120502195025/http://courses.missouristate.edu/KenVollmar/MARS/ |archive-date=May 2, 2012  }}</ref> is another GUI-based MIPS emulator designed for use in education, specifically for use with Hennessy's ''Computer Organization and Design''.

WebMIPS<ref>{{cite web |url=http://www.maiconsoft.com.br/webmips/index.asp |title=WebMIPS - MIPS CPU PIPLINED SIMULATION On Line |access-date=January 13, 2012 |url-status=dead |archive-url=https://archive.today/20121231212131/http://www.maiconsoft.com.br/webmips/index.asp |archive-date=December 31, 2012  }} (online demonstration) {{cite web |url=http://www.dii.unisi.it/~giorgi/WEBMIPS/ |title=Archived copy |access-date=January 13, 2012 |url-status=live |archive-url=https://web.archive.org/web/20111010100936/http://www.dii.unisi.it/~giorgi/WEBMIPS/ |archive-date=October 10, 2011  }} (source)</ref> is a browser-based MIPS simulator with visual representation of a generic, pipelined processor. This simulator is quite useful for register tracking during step by step execution.

QtMips provides a simple 5-stage pipeline visualization as well as cache principle visualization for basic computer architectures courses.<ref>{{GitHub|cvut/QtMips/|QtMips - MIPS CPU simulator for education purposes}}</ref><ref>{{cite thesis |type=MSc |last=Kočí |first=Karel |date=2018 |title=Graphical CPU Simulator with Cache Visualization |publisher=[[Czech Technical University in Prague]] |url=https://dspace.cvut.cz/bitstream/handle/10467/76764/F3-DP-2018-Koci-Karel-diploma.pdf |access-date=January 25, 2021 |url-status=live |archive-date=November 19, 2020 |archive-url=https://web.archive.org/web/20201119140019/https://dspace.cvut.cz/bitstream/handle/10467/76764/F3-DP-2018-Koci-Karel-diploma.pdf }}</ref><ref>{{cite web |last=Gizopoulos |first=Dimitris |author-link=Dimitris Gizopoulos |url=https://eclass.uoa.gr/modules/document/file.php/D52/%CE%94%CE%B9%CE%B1%CF%86%CE%AC%CE%BD%CE%B5%CE%B9%CE%B5%CF%82/%CE%A4%CE%B1%20%CE%B2%CE%B1%CF%83%CE%B9%CE%BA%CE%AC%20%CF%84%CE%BF%CF%85%20QtMips-v3.pdf |title=The basics of QtMips-v3 |date=December 6, 2020|publisher=[[National and Kapodistrian University of Athens]] |access-date=January 25, 2021}}{{dead link|date=February 2022}}</ref> It is available both as a [[web application]] and as a downloadable program for Windows, [[Linux]], and [[macOS]].

More advanced free emulators are available from the [[GXemul]] (formerly known as the mips64emul project) and [[QEMU]] projects. These emulate the various MIPS III and IV microprocessors in addition to entire computer systems which use them.

Commercial simulators are available especially for the embedded use of MIPS processors, for example Wind River [[Simics]] (MIPS 4Kc and 5Kc, PMC RM9000, QED RM7000, Broadcom/Netlogic ec4400, [[Cavium]] Octeon I), [[Imperas]] (all MIPS32 and MIPS64 cores), VaST Systems (R3000, R4000), and [[CoWare]] (the MIPS4KE, MIPS24K, MIPS25Kf and MIPS34K).

The Creator simulator<ref>{{Cite journal|url=https://doi.org/10.1109/ACCESS.2024.3406935|title=CREATOR: An Educational Integrated Development Environment for RISC-V Programming|date=May 29, 2024|doi=10.1109/ACCESS.2024.3406935 |lang=en|access-date=July 24, 2024|journal=IEEE Access |last1=Camarmas-Alonso |first1=Diego |last2=Garcia-Carballeira |first2=Felix |last3=Del-Pozo-Punal |first3=Elias |last4=Mateos |first4=Alejandro Calderon |pages=1–17 |issn=2169-3536|doi-access=free }}</ref><ref>{{Cite web|url=https://zenodo.org/record/5130302|title=CREATOR: Simulador didáctico y genérico para la programación en ensamblador|date=July 23, 2021|language=es|access-date=September 29, 2021|archive-date=September 29, 2021|archive-url=https://web.archive.org/web/20210929155448/https://zenodo.org/record/5130302|url-status=live}}</ref><ref>{{Cite conference|url=https://doi.org/10.1109/CLEI53233.2021.9640144|title=A new generic simulator for the teaching of assembly programming|date=Aug 2, 2022|doi=10.1109/CLEI53233.2021.9640144 |lang=es|access-date=August 2, 2022|conference=2021 XLVII Latin American Computing Conference (CLEI) |last1=Camarmas-Alonso |first1=Diego |last2=Garcia-Carballeira |first2=Felix |last3=Del-Pozo-Punal |first3=Elias |last4=Mateos |first4=Alejandro Calderon |pages=1–9 |isbn=978-1-6654-9503-5 |s2cid=245387555}}</ref><ref>{{cite web|title=CREATOR Web with MIPS32 example|url=https://creatorsim.github.io/creator/?example_set=default&example=e12|archive-url=https://web.archive.org/web/20210929155446/https://creatorsim.github.io/creator/?example_set=default&example=e12|archive-date=September 29, 2021|url-status=live}}</ref><ref>{{GitHub|creatorsim/creator|CREATOR source code}}</ref> is portable and allows the user to learn various assembly languages of different processors (Creator has examples with an implementation of MIPS32 and RISC-V instructions).

WepSIM<ref>{{cite web|title=WepSIM with a MIPS32 example|url=https://wepsim.github.io/wepsim/ws_dist/wepsim-classic.html?mode=ep&examples_set=Default-MIPS&example=12&simulator=assembly:registers&notify=false|work=WepSIM|access-date=July 25, 2022|archive-date=July 25, 2022|archive-url=https://web.archive.org/web/20220725200132/https://wepsim.github.io/wepsim/ws_dist/wepsim-classic.html?mode=ep&examples_set=Default-MIPS&example=12&simulator=assembly:registers&notify=false|url-status=live}}</ref><ref>{{GitHub|wepsim/wepsim|WepSIM source code}}</ref> is a browser-based simulator where a subset of MIPS instructions are micro-programmed. 
This simulator is very useful in order to learn how a CPU works
([https://wepsim.github.io/wepsim/ws_dist/?mode=ep&examples_set=Default-MIPS&example=0&simulator=microcode:control_memory&notify=false microprogramming] {{Webarchive|url=https://web.archive.org/web/20220726002649/https://wepsim.github.io/wepsim/ws_dist/?mode=ep&examples_set=Default-MIPS&example=0&simulator=microcode:control_memory&notify=false |date=July 26, 2022 }},
[https://wepsim.github.io/wepsim/ws_dist/wepsim-classic.html?mode=ep&examples_set=Default-MIPS&example=18&simulator=assembly:registers&notify=false MIPS routines] {{Webarchive|url=https://web.archive.org/web/20220726002658/https://wepsim.github.io/wepsim/ws_dist/wepsim-classic.html?mode=ep&examples_set=Default-MIPS&example=18&simulator=assembly:registers&notify=false |date=July 26, 2022 }},
[https://wepsim.github.io/wepsim/ws_dist/wepsim-classic.html?mode=ep&examples_set=Default-MIPS&example=8&simulator=assembly:registers&notify=false interruptions] {{Webarchive|url=https://web.archive.org/web/20220820181837/https://wepsim.github.io/wepsim/ws_dist/wepsim-classic.html?mode=ep&examples_set=Default-MIPS&example=8&simulator=assembly:registers&notify=false |date=August 20, 2022 }},
[https://wepsim.github.io/wepsim/ws_dist/wepsim-classic.html?mode=ep&examples_set=Default-MIPS&example=9&simulator=assembly:registers&notify=false system calls] {{Webarchive|url=https://web.archive.org/web/20220726002658/https://wepsim.github.io/wepsim/ws_dist/wepsim-classic.html?mode=ep&examples_set=Default-MIPS&example=9&simulator=assembly:registers&notify=false |date=July 26, 2022 }},
etc.)