Editing Flash memory (section)

===Memory wear===
Another limitation is that flash memory has a finite number of program–erase cycles (typically written as P/E&nbsp;cycles).<ref name="snia-2009-04">{{Cite tech report |url=https://www.snia.org/sites/default/files/SSSI_NAND_Reliability_White_Paper_0.pdf |title=NAND Flash Solid State Storage for the Enterprise, An In-depth Look at Reliability |last=Thatcher |first=Jonathan |last2=Coughlin |first2=Tom |date=April 2009 |publisher=Solid State Storage Initiative (SSSI) of the Storage Network Industry Association (SNIA) |last3=Handy |first3=Jim |last4=Ekker |first4=Neal |access-date=6 December 2011 |archive-url=https://web.archive.org/web/20111014033413/http://snia.org/sites/default/files/SSSI_NAND_Reliability_White_Paper_0.pdf |archive-date=14 October 2011 |url-status=live }}</ref><ref name="kingston-slc-mlc-tlc">{{Cite web |date=February 2022 |title=Difference between SLC, MLC, TLC and 3D NAND in USB flash drives, SSDs and memory cards |url=https://www.kingston.com/en/blog/pc-performance/difference-between-slc-mlc-tlc-3d-nand |url-status=live |archive-url=https://web.archive.org/web/20231128154805/https://www.kingston.com/en/blog/pc-performance/difference-between-slc-mlc-tlc-3d-nand |archive-date=28 November 2023 |publisher=[[Kingston Technology]] }}</ref> [[Micron Technology]] and [[Sun Microsystems]] announced an SLC&nbsp;NAND flash memory chip rated for 1,000,000&nbsp;P/E&nbsp;cycles on 17 December 2008.<ref name="micron-20081217">{{Cite press release |last=Bordner |first=Kirstin |date=17 December 2008 |title=Micron Collaborates with Sun Microsystems to Extend Lifespan of Flash-Based Storage, Achieves One Million Write Cycles |url=https://investors.micron.com/news-releases/news-release-details/micron-collaborates-sun-microsystems-extend-lifespan-flash-based |url-status=live |archive-url=https://web.archive.org/web/20220320082948/https://investors.micron.com/news-releases/news-release-details/micron-collaborates-sun-microsystems-extend-lifespan-flash-based |archive-date=20 March 2022 |publisher=[[Micron Technology]] |place=Boise, Idaho }}</ref>

The guaranteed cycle count may apply only to block zero (as is the case with [[Thin small-outline package|TSOP]]&nbsp;NAND devices), or to all blocks (as in NOR). This effect is mitigated in some chip firmware or file system drivers by counting the writes and dynamically remapping blocks in order to spread write operations between sectors; this technique is called [[wear leveling]]. Another approach is to perform write verification and remapping to spare sectors in case of write failure, a technique called [[Bad sector|bad block]] management (BBM). For portable consumer devices, these wear out management techniques typically extend the life of the flash memory beyond the life of the device itself, and some data loss may be acceptable in these applications. For high-reliability data storage, however, it is not advisable to use flash memory that would have to go through a large number of programming cycles. This limitation also exists for "read-only" applications such as [[thin client]]s and [[Router (computing)|routers]], which are programmed only once or at most a few times during their lifetimes, due to ''[[#Read disturb|read disturb]]'' (see below).

In December 2012, Taiwanese engineers from Macronix revealed their intention to announce at the 2012 IEEE International Electron Devices Meeting that they had figured out how to improve NAND&nbsp;flash storage read/write cycles from 10,000 to 100 million cycles using a "self-healing" process that used a flash chip with "onboard heaters that could anneal small groups of memory cells."<ref name="phys-20121202">{{Cite news |last=Owano |first=Nancy |date=2 December 2012 |title=Taiwan engineers defeat limits of flash memory |work=phys.org |url=https://phys.org/news/2012-12-taiwan-defeat-limits-memory.html |url-status=live |archive-url=https://web.archive.org/web/20160209010327/http://phys.org/news/2012-12-taiwan-defeat-limits-memory.html |archive-date=9 February 2016 }}</ref> The built-in thermal annealing was to replace the usual erase cycle with a local high temperature process that not only erased the stored charge, but also repaired the electron-induced stress in the chip, giving write cycles of at least 100 million.<ref name="register-20121203">{{Cite news |last=Sharwood |first=Simon |date=3 December 2012 |title=Flash memory made immortal by fiery heat |work=[[The Register]] |url=https://www.theregister.co.uk/2012/12/03/macronix_thermal_annealing_extends_life_of_flash_memory/ |url-status=live |archive-url=https://web.archive.org/web/20170913183926/https://www.theregister.co.uk/2012/12/03/macronix_thermal_annealing_extends_life_of_flash_memory/ |archive-date=13 September 2017 }}</ref> The result was to be a chip that could be erased and rewritten over and over, even when it should theoretically break down. As promising as Macronix's breakthrough might have been for the mobile industry, however, there were no plans for a commercial product featuring this capability to be released any time in the near future.<ref name="yahoo1">{{Cite news |last=Wong |first=Raymond |date=4 December 2012 |title=Flash memory breakthrough could lead to even more reliable data storage |work=[[Yahoo! News]] |url=https://news.yahoo.com/flash-memory-breakthrough-could-lead-even-more-reliable-124049340.html |url-status=live |archive-url=https://web.archive.org/web/20231102140438/https://news.yahoo.com/flash-memory-breakthrough-could-lead-even-more-reliable-124049340.html |archive-date=2 November 2023 }}</ref>