Editing Counter (digital) (section)

==Applications==

Binary counters are widely used as timers and event counters.

In a digital timer, the counter is clocked by a periodic digital signal which serves as a time reference and causes the count to change at a constant rate. The clock signal is typically sourced by a stable frequency source such as a crystal oscillator, either directly or via a clock divider. Depending on the application, a timer may output a signal that indicates timing status, or it may output the current count, or both. In the latter case, the count typically indicates either the elapsed or remaining time.

Event counters are typically used to count asynchronous events that may or may not occur at variable frequencies. At any particular time, the current count indicates the number of events that have occurred since event counting began.

===Memory addressing===

Binary counters are used extensively in computers for addressing memory. A common example of this is the [[program counter]] (PC) used in [[central processing unit]]s, such as the one shown below:

[[File:Program counter.jpg|350px|border|A program counter based on an n-bit binary counter]]

In the above PC, the current count is the memory address of the next instruction to be executed. Upon processor reset, the count is zeroed so that execution will begin at address zero. When an instruction is fetched from memory, CE (count enable) is asserted to allow the counter to increment the count and thus advance to the next sequential instruction address. If it becomes necessary to switch execution to a different instruction sequence (e.g., due to executing a branch instruction, subroutine call, interrupt, or return from subroutine or interrupt), the address of the first instruction in the new sequence is applied to the Data inputs and Load is asserted; this overrides CE (if asserted) and copies Data to Count.

===One-shot timer===

The one-shot timer shown below uses a binary down-counter to generate an output pulse of precisely controlled duration. The timer output is the logical OR of all bits in the current count, and consequently the output pulse is active while the timer is running (I.e., when the count is not zero). When the count reaches zero, the output pulse is terminated and counting is halted.

[[File:One-shot timer.jpg|350px|border|Schematic diagram of a digital one-shot timer]]

To start the timer running, a value representing the desired pulse width is applied to the counter's Data inputs and Load is asserted. The pulse width is specified in terms of clock cycles. For example, in the case of a 1 MHz clock, a 100 microsecond output pulse has a duration of 100 clock cycles, as shown below:

[[File:One-shot timing diagram.jpg|350px|border|Timing diagram of a digital one-shot timer]]

This timer is ''retriggerable'', meaning that it can be restarted while running and thus stretch (extend the duration of) the output pulse.

===Periodic interval timer===

Binary counters are commonly used as periodic interval timers (PITs), which output periodic pulses at an integer fraction of the clock frequency. PITs are used to generate [[system clock]] interrupts in computers, as clock dividers in [[phase lock loop]]s and [[frequency synthesizer]]s, and in many other applications.

In the circuit below, a binary down-counter is used to implement a PIT. The interval between output pulses, measured in clock cycles, is stored in the Interval register, resulting in output frequency <math>f_{out} = f_{clock} / (interval + 1)</math>. When the count reaches zero, the NOR gate issues a pulse on the timer output. The output pulse is also used internally to reload the interval into the counter, thus restarting the timer. Each output pulse has a duration of one clock cycle.

[[File:Programmable interval timer.jpg|350px|border|Programmable interval timer]]

For example, to obtain a 1 MHz output frequency from a 6 MHz clock, the interval would be set to 5 as shown in the following timing diagram:

[[File:Programmable interval timer timing diagram.jpg|350px|border|Timing diagram of a programmable interval timer]]

===Pulse width modulator===

Binary counters are an essential building block in digital [[pulse width modulation|pulse width modulators]], which are commonly used to control motor speed, temperature, LED brightness, and other physical processes. These can be implemented in various ways. For example, the pulse width modulator shown below uses a single binary up-counter with synchronous reset to control both the width and frequency of output pulses:

[[File:PWM generator.jpg|450px|border|Digital pulse width modulator]]

The value stored in the PWM period register (<math>Period</math>) determines the output frequency. <math>Count</math> increments at clock frequency <math>f_{clock}</math> until it matches <math>Period</math>, which causes the identity comparator to strobe EndCycle, thus resetting the counter and starting the next output cycle. Consequently, the counter modulus is <math>Period + 1</math> and the output pulse frequency <math>f_{out} = f_{clock} / (Period + 1)</math>.

<math>Width</math> specifies the output pulse width in clock periods. The magnitude comparator asserts <math>Preview</math> while Count is less than <math>Width</math>, thus producing a pulse that starts at the beginning of the output cycle and ends when the count reaches <math>Width</math>. A flip-flop buffers <math>Preview</math> to prevent glitches from appearing on the PWM output.

The [[duty cycle]] is the percentage of PWM cycle time in which the pulse is active: <math>Duty cycle = 100 * Width / (Period + 1)</math>. For example, the following diagram shows signal timing for <math>Period = 11</math> and <math>Width = 3</math>, resulting in a 25 percent duty cycle at <math>f_{clock} / 12</math> Hertz.

[[File:PWM generator timing.jpg|450px|border|Example timing diagram for digital pulse width modulator with Period=11 and Width=3]]

===Pulse width measurement===

[[Pulse width]] measurement is a common counter application that is used in a wide variety of equipment, including [[radar]] and [[sonar]], [[industrial automation]], and [[medical imaging]] systems. A typical circuit is shown below, which uses a binary up-counter to measure the widths of asynchronous (with respect to the counter clock) positive pulses.

[[File:Pulse width measurement circuit.jpg|500px|border|Schematic diagram of a pulse measurement circuit based on a binary up-counter]]

The measured signal is first synchronized to the counter's clock domain, thus producing the synchronized input signal ''Clock gate''. This is done to prevent measurement errors due to [[metastability (electronics)|metastability]] or violations of minimum [[Flip-flop (electronics)#Timing considerations|setup or hold times]] in the counter and edge detector flip-flops.

When a ''Clock gate'' pulse begins, the rising edge detector strobes ''Start'' to zero the count, and the counter then proceeds to count clock pulses while ''Clock gate'' remains active. When the pulse ends, the counter stops counting and the accumulated count indicates the measured pulse width in units of clock periods. The pulse width is <math display="inline">Count / f_{clock}</math> seconds, where <math>f_{clock}</math> is the clock frequency in Hertz.

A falling edge detector strobes ''End'' to indicate end of measurement, which can be used to signal external circuitry or transfer the count to external storage, or both, before the next measurement begins.

===Frequency counter===

Some counter applications utilize multiple counters. An example of this is the [[frequency counter]] shown below, which uses two counters to measure the frequency of a digital signal. One counter, configured as a one-shot, produces a pulse of precisely controlled width known as the ''time gate''. The time gate is used to enable the clocking of an event counter, which is clocked by the signal whose frequency is to be measured.

[[File:Basic frequency counter.jpg|500px|border|Frequency counter]]

When a measurement begins (by asserting ''Start''), the event counter is zeroed and then proceeds to count rising edges of the unknown frequency signal while the time gate remains active. When the time gate ends, edge counting stops and the accumulated count indicates the measured frequency. The count directly indicates the measured frequency in Hz when the gate time is one second; for other gate times, the count must be scaled to obtain Hz.

===Position tracking===

Bidirectional binary counters are commonly used to track the physical position of moving objects that are monitored by [[incremental encoder]]s, as shown in the example circuit below. A position change is indicated by a rising or falling edge on the encoder's A or B output signal. Each position change is associated with a well-defined distance <math>d</math>, with the phase difference between A and B indicating the direction of travel (e.g., "forward" or "reverse"). The count is incremented or decremented when the object moves in the forward or reverse direction, respectively.

[[File:Incremental encoder interface.jpg|500px|border|Simplified schematic diagram of an incremental encoder interface]]

To begin tracking, the monitored object is located at a reference position (<math>p_0</math>) and the count is zeroed. From that point on, the count indicates the current position in terms of displacement from the reference position, measured in <math>d</math> distance units: <math>position = p_0 + Count * d</math>. The count is effectively a signed integer in cases where the object can move to either side of the reference position.

===Stepped sinusoidal waveform generator===

A [[sinusoidal]] voltage waveform can be approximated by cycling through the output states of a Johnson counter and [[Operational amplifier applications#Summing amplifier|summing the output voltages]] through a network of resistors whose weights map each counter state to a point in the cosine function:<ref name="davies" /><blockquote>[[File:A simple sinusoid generator.jpg|550px|border|Sinusoidal voltage generator based on a Johnson counter]]</blockquote>The stepped sinusoid's frequency ''{{Math|{{mvar|F{{sub|out}}}}}}'' equals {{Fraction|{{mvar|F{{sub|in}}}}|(2{{mvar|n}})}} for ''{{Math|{{mvar|n}}}}'' flip-flops and a clock frequency of ''{{Math|{{mvar|F{{sub|in}}}}}}''. Consequently, the sinusoidal waveform frequency can be changed simply by changing the clock frequency.

Harmonic distortion is reduced by increasing <math>n</math>, which gives more steps and smaller step sizes in the waveform; by increasing resistance accuracy; and by adding a capacitor or active filter to [[low-pass filter]] the edges.
{{Multi image
| image1            = Stepped sinusoid.svg
| image2            = Stepped sinusoidal wave.svg
| total_width       = 600
| align             = center
| caption1          = The 8-bit Johnson counter has 16 states and thus completes one period of a stepped sine wave every 16 clock pulses
| caption2          = The counter's bits for each clock pulse over one period of the sine wave
| header            = Stepped sinusoidal waveform using an 8-bit Johnson counter
}}