Editing ARM architecture family (section)

====Other features====
Another feature of the [[instruction set]] is the ability to fold shifts and rotates into the ''data processing'' (arithmetic, logical, and register-register move) instructions, so that, for example, the statement in [[C (programming language)|C]] language:

<syntaxhighlight lang="c">a += (j << 2);</syntaxhighlight>

could be rendered as a one-word, one-cycle instruction:<ref>{{cite web |url=http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0214b/ch09s01s02.html |title=9.1.2. Instruction cycle counts}}</ref>

<syntaxhighlight lang="nasm">ADD  Ra, Ra, Rj, LSL #2</syntaxhighlight>

This results in the typical ARM program being denser than expected with fewer memory accesses; thus the pipeline is used more efficiently.

The ARM processor also has features rarely seen in other RISC architectures, such as [[program counter|PC]]-relative addressing (indeed, on the 32-bit<ref name="v8arch">{{cite web |url=https://www.arm.com/files/downloads/ARMv8_Architecture.pdf |title=ARMv8-A Technology Preview |year=2011 |access-date=31 October 2011 |first=Richard |last=Grisenthwaite |archive-url=https://web.archive.org/web/20111111161327/https://www.arm.com/files/downloads/ARMv8_Architecture.pdf |archive-date=11 November 2011}}</ref> ARM the [[program counter|PC]] is one of its 16&nbsp;registers) and pre- and post-increment addressing modes.

The ARM instruction set has increased over time. Some early ARM processors (before ARM7TDMI), for example, have no instruction to store a two-byte quantity.