Editing Synchronous dynamic random-access memory (section)

=== DDR2 ===
{{Main|DDR2 SDRAM}}

DDR2 SDRAM is very similar to DDR SDRAM, but doubles the minimum read or write unit again, to four consecutive words. The bus protocol was also simplified to allow higher performance operation. (In particular, the "burst terminate" command is deleted.) This allows the bus rate of the SDRAM to be doubled without increasing the clock rate of internal RAM operations; instead, internal operations are performed in units four times as wide as SDRAM. Also, an extra bank address pin (BA2) was added to allow eight banks on large RAM chips.

Typical DDR2 SDRAM clock rates are 200, 266, 333 or 400&nbsp;MHz (periods of 5, 3.75, 3 and 2.5&nbsp;ns), generally described as DDR2-400, DDR2-533, DDR2-667 and DDR2-800 (periods of 2.5, 1.875, 1.5 and 1.25&nbsp;ns). Corresponding 240-pin DIMMs are known as PC2-3200 through PC2-6400. DDR2 SDRAM is now available at a clock rate of 533&nbsp;MHz generally described as DDR2-1066 and the corresponding DIMMs are known as PC2-8500 (also named PC2-8600 depending on the manufacturer). Performance up to DDR2-1250 (PC2-10000) is available.

Note that because internal operations are at 1/2 the clock rate, DDR2-400 memory (internal clock rate 100&nbsp;MHz) has somewhat higher latency than DDR-400 (internal clock rate 200&nbsp;MHz).